http://iet.metastore.ingenta.com
1887

Considerations in the design of a low-voltage power MOSFET technology

Considerations in the design of a low-voltage power MOSFET technology

For access to this article, please select a purchase option:

Buy article PDF
$19.95
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
IET Power Electronics — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

Discrete low-voltage power metal-oxide-semiconductor field effect transistors are used in a wide variety of applications with each application relying on different aspects of device behaviour. The conflicting requirements of these applications along with constraints such as legislation, industrial base, and intellectual property have resulted in a diverse array of technologies available in the market. This study outlines the many considerations that are faced when designing a high-performance silicon power MOSFET technology contrasting the trade-offs involved as factors such as on-state resistance, switching performance, reliability, and robustness in the application are optimised.

References

    1. 1)
      • 1. Williams, R.K., Darwish, M.N., Blanchard, R.A., et al: ‘The trench power MOSFET: part I – history, technology, and prospects’, IEEE Trans. Electron Devices, 2017, 64, (3), pp. 674691.
    2. 2)
      • 2. Williams, R.K., Darwish, M.N., Blanchard, R.A., et al: ‘The trench power MOSFET – part II: application specific VDMOS, LDMOS, packaging, and reliability’, IEEE Trans. Electron Devices, 2017, 64, (3), pp. 692712.
    3. 3)
      • 3. ‘DA5 Customer Presentation’, 9 December 2018. Available at https://www.infineon.com/cms/services/dgdl?fileId=5546d4616102d26701610905cfde0005, accessed 16th July 2019.
    4. 4)
      • 4. ‘UL 2595 General Requirements for Battery-Powered Appliances’. Available at https://standardscatalog.ul.com/standards/en/standard_2595, accessed 16th July 2019.
    5. 5)
      • 5. https://efficiencywins.nexperia.com/innovation/innovating-to-meet-changing-standards-UL2925.html, accessed 16th July 2019.
    6. 6)
      • 6. US Court of Appeals for the Federal Circuit – 378 F.3d 1396 (Fed. Cir. 2004).
    7. 7)
      • 7. Baliga, J.B.: ‘Power semiconductor devices having improved high frequency switching and breakdown characteristics’. European Patent, EP 1145327 B2, 2 May 2018.
    8. 8)
      • 8. Appeal No T1920/12-3.4.03. Available at https://register.epo.org/application?number=EP99971151&lng=en&tab=doclist, accessed 16th July 2019.
    9. 9)
      • 9. Alpern, P., Nelle, P., Barti, E., et al: ‘On the way to zero defect of plastic-encapsulated electronic power devices, part I to part III’, IEEE Trans. Device Mater. Reliab., 2009, 9, (2), pp. 279, pp. 269, & pp. 288.
    10. 10)
      • 10. Ackaert, J., Malik, A., Vanderstraeten, D.: ‘Impact of the leadframe profile on the occurrence of passivation cracks of plastic-encapsulated electronic power devices’. Proc. of 2013 Int. Conf. on IC Design & Technology (ICICDT), Pavia, Italy, 2013.
    11. 11)
      • 11. Zhang, Z., Suo, Z., Liu, Y., et al: ‘Methodology for avoidance of ratcheting-induced stable cracking (RISC) in microelectronic devices’. Electronic Components and Technology Conf., San Diego, CA, USA, 2006, p. 1434.
    12. 12)
      • 12. Qian, Q., Liu, Y., Irving, S., et al: ‘Analysis of the impact of polyimide coating on passivation reliability by simulation’. Electronic Components and Technology Conf., Reno, NV, 2007, p. 264.
    13. 13)
      • 13. Kuboyama, S., Maru, A., Ikeda, N., et al: ‘Characterization of microdose damage caused by single heavy ion observed in trench type power MOSFETs’, IEEE Trans. Nucl. Sci., 2010, 57, (6), p. 3257.
    14. 14)
      • 14. Ying, W., Yu, C., Cao, F., et al: ‘Simulation study of single event effects for split-gate enhanced power U-shape metal-oxide semiconductor field-effect transistor’, IET Power Electron., 2014, 7, (12), pp. 28952901.
    15. 15)
      • 15. Lauenstein, J., Topper, A.D., Casey, M.C., et al: ‘Recent radiation test results for power MOSFETs’. IEEE Radiation Effects Data Workshop (REDW), San Francisco, CA, USA, 2013, pp. 19.
    16. 16)
      • 16. Koga, R., Bielat, S., George, J.: ‘Charged particle induced degradation of trench type n-channel power MOSFETs’. IEEE Radiation Effects Data Workshop (REDW), Paris, France, 2014, pp. 17.
    17. 17)
      • 17. Schindler, G., Bach, K.-H., Nelle, P., et al: ‘Impact of alpha-radiation on power MOSFETs’. IEEE Int. Reliability Physics Symp. (IRPS), Pasadena, CA, USA, 2016, pp. 5C-2-15C-2-5.
    18. 18)
      • 18. McPherson, J.W., Baglee, D.A.: ‘Acceleration factors for thin oxide breakdown’, J. Electrochem. Soc., 1985, 132, p. 1903.
    19. 19)
      • 19. Efthymiou, E., Rutter, P., Whiteley, P.: ‘A methodology for projecting SiO2 thick gate oxide reliability on trench power MOSFETs and its application on MOSFETs VGS rating’, Microelectron. Reliab., 2015, 58, pp. 2632.
    20. 20)
      • 20. Internal benchmarking of 30 V Power SO8 devices at Nexperia.
    21. 21)
      • 21. Kohlmann, K., Burggraf, J.: ‘Approaches to thin PowerMOS wafers to less than 20 μm’. Proc. of ‘Be-Flexible’ Workshop, Munich, Germany, 2009.
    22. 22)
      • 22. Wang, Q., Li, M., Sokolov, Y., et al: ‘Power trench MOSFET devices on metal substrates’, IEEE Electron Device Lett., 2008, 29, (9), p. 1040.
    23. 23)
      • 23. Rutter, P., Peake, S.T.: ‘Low voltage superjunction power MOSFET: an application optimized technology’. 2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conf. and Exposition (APEC), Fort Worth, TX, USA, 2011, pp. 491499.
    24. 24)
      • 24. Kawashima, Y., Inomata, H., Murakawa, K., et al: ‘Narrow-pitch n-channel superjunction UMOSFET for 40–60 V automotive application’. 2010 22nd Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Hiroshima, Japan, 2010, pp. 329332.
    25. 25)
      • 25. Goarin, P., van Dalen, R., Koops, G.E.J., et al: ‘Split-gate resurf stepped oxide (RSO) MOSFETs for 25 V applications with record low gate-to-drain charge’. Proc. 19th Int. Symp. on Power Semiconductor Devices and IC's (ISPSD), Jeju Island, Republic of Korea, 2007, pp. 6164.
    26. 26)
      • 26. Häberlen, O., Pölzl, M., Schoiswohl, J., et al: ‘95% DC-DC conversion efficiency by novel trench power MOSFET with dual channel structure to cut body diode losses’. 2015 IEEE 27th Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Hong Kong, People's Republic of China, 2015, p. 65.
    27. 27)
      • 27. Zingg, R.P.: ‘On the specific on-resistance of high-voltage and power devices’, IEEE Trans. Electron Devices, 2004, 51, (3), pp. 492499.
    28. 28)
      • 28. Su, X., Feng, Q.: ‘Investigation of performance optimized power trench MOSFETs with double-epilayer’. Int. Conf. on Advanced Power System Automation and Protection, Beijing, People's Republic of China, 2011, vol. 3, pp. 21662169.
    29. 29)
      • 29. Hu, C., Chi, M.-H., Patel, V.M.: ‘Optimum design of power MOSFET's’, IEEE Trans. Electron Devices, 1984, 31, (12), pp. 16931700.
    30. 30)
      • 30. Yahata, A., Inoue, T., Ohashi, H.: ‘Exact evaluation of channel mobility for trench MOSFET using split C–V method’, Appl. Surf. Sci., 1997, 117/118, pp. 181186.
    31. 31)
      • 31. van den Heuvel, M.G.L., Hueting, R.J.E., Hijzen, E.A., et al: ‘An improved method for determining the inversion layer mobility of electrons in trench MOSFETs’. Proc. ISPSD '03. 2003 IEEE 15th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Cambridge, UK, 2003, pp. 173176.
    32. 32)
      • 32. Lopez, T., Elferich, R., Alarcon, E.: ‘Voltage regulators for next generation microprocessors’ (Springer, USA, 2011).
    33. 33)
      • 33. Yang, B., Zhang, J.: ‘Effect and utilization of common source inductance in synchronous rectification’. Twentieth Annual IEEE Applied Power Electronics Conf. and Exposition (APEC), Austin, TX, USA, 2005, vol. 3, pp. 14071411.
    34. 34)
      • 34. Alatise, O., Parker-Allotey, N.-A., Jennings, M., et al: ‘Modeling the impact of the trench depth on the gate–drain capacitance in power MOSFETs’, IEEE Electron Device Lett., 2011, 32, (9), pp. 12691271.
    35. 35)
      • 35. Rutter, P., Peake, S.T.: ‘Low voltage TrenchMOS combining low specific RDS(on) and QG FOM’. 2010 22nd Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Hiroshima, Japan, 2010, pp. 325328.
    36. 36)
      • 36. Chang, H.-R.: ‘Trench gate structure with thick bottom oxide’. U.S. Patent 4 992 390, 12 February 1991.
    37. 37)
      • 37. Darwish, M., Yue, C., Lui, K., et al: ‘A new power W-gated trench MOSFET (WMOSFET) with high switching performance’. 2003 IEEE 15th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Cambridge, UK, 2003, pp. 2427.
    38. 38)
      • 38. Hueting, R.J., Hitzen, E.A., Heringa, A., et al: ‘Gate-drain charge analysis for switching in power trench MOSFETs’, IEEE Trans. Electron Devices, 2004, 51, pp. 13231330.
    39. 39)
      • 39. Shen, Z.J., Okada, D.N., Lin, F., et al: ‘Lateral discrete power MOSFET: enabling technology for next-generation, MHz-frequency, high-density DC/DC converters’. Nineteenth Annual IEEE Applied Power Electronics Conf. and Exposition (APEC), Anaheim, CA, USA, 2004, pp. 225229.
    40. 40)
      • 40. Xu, S., Korec, J., Jauregui, D., et al: ‘NexFET a new power device’. Int. Electron Devices Meeting (IEDM), Baltimore, MD, USA, 2009, pp. 145148.
    41. 41)
      • 41. Jin, F., Liu, D., Xing, J., et al: ‘Best-in-class LDMOS with ultra-shallow trench isolation and p-buried layer from 18 V to 40 V in 0.18 μm BCD technology’. 2017 29th Int. Symp. on Power Semiconductor Devices and IC's (ISPSD), Sapporo, Japan, 2017, pp. 295298.
    42. 42)
      • 42. Bai, Y., Pattanayak, D., Huang, A.Q.: ‘Analysis of dv/dt induced spurious turn-on of MOSFET’. CPES Annual Seminar, Blacksburg, VA, USA, 2003.
    43. 43)
      • 43. Nishiwaki, T., Hara, T., Kaganoi, K., et al: ‘Design criteria for shoot-through elimination in trench field plate power MOSFET’. 2014 IEEE 26th Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Waikoloa, HI, USA, 2014, pp. 382385.
    44. 44)
      • 44. Rutter, P., Peake, S., Elford, A.: ‘Low voltage MOSFET optimized for low VDS transient voltages’. 2013 25th Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Kanazawa, Japan, 2013, pp. 8386.
    45. 45)
      • 45. Chen, J.: ‘Design optimal built-in snubber in trench field plate power MOSFET for superior EMI and efficiency performance’. 2015 Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, USA, 2015, pp. 459462.
    46. 46)
      • 46. Roig, J., Tong, C.-F., Bauwens, F., et al: ‘Internal self-damping optimization in trench power FETs for high-frequency conversion’. 2014 IEEE Applied Power Electronics Conf. and Exposition (APEC), Fort Worth, TX, USA, 2014, pp. 137142.
    47. 47)
      • 47. Dolny, G.M., Sapp, S., Elbanhaway, A., et al: ‘The influence of body effect and threshold voltage reduction on trench MOSFET body diode characteristics’. 2004 Proc. 16th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Kitakyushu, Japan, 2004, pp. 217220.
    48. 48)
      • 48. Lopez, T., Elferich, R., Koper, N.: ‘Reverse recovery in high density trench MOSFETs with regard to the body-effect’. 2006 IEEE Int. Symp. on Power Semiconductor Devices and IC's (ISPSD), Naples, Italy, 2006.
    49. 49)
      • 49. Elferich, R., Lopez, T.: ‘Impact of gate voltage bias on reverse recovery losses of power MOSFETs’. Twenty-First Annual IEEE Applied Power Electronics Conf. and Exposition (APEC), Dallas, TX, USA, 2006.
    50. 50)
      • 50. Hirler, F.: ‘Semiconductor device and manufacturing method therefor’. US Patent 2010/0301410, 2 December 2010.
    51. 51)
      • 51. Ono, S., Yamaguchi, Y., Matsuda, N., et al: ‘High density MOSBD (UMOS with built-in trench Schottky barrier diode) for synchronous buck converters’. 2006 IEEE Int. Symp. on Power Semiconductor Devices and IC's (ISPSD), Naples, Italy, 2006.
    52. 52)
      • 52. Calafut, D.: ‘Trench power MOSFET lowside switch with optimized integrated Schottky diode’. 2004 Proc. 16th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Kitakyushu, Japan, 2004, pp. 397400.
    53. 53)
      • 53. Kinzer, D.: ‘Advances in power switch technology for 40 V – 300 V applications’. European Conf. on Power Electronics and Applications, Dresden, Germany, 2005.
    54. 54)
      • 54. Rutter, P., Heppenstall, K., Koh, A., et al: ‘High current repetitive avalanche of low voltage trench power MOSFETs’. 2009 21st Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), Barcelona, Spain, 2009, pp. 112115.
    55. 55)
      • 55. Alatise, O., Kennedy, I., Petkos, G., et al: ‘The impact of repetitive unclamped inductive switching on the electrical parameters of low-voltage trench power nMOSFETs’, IEEE Trans. Electron Devices, 2010, 57, (7), pp. 16511658.
    56. 56)
      • 56. Nishiwaki, T., Katoh, S., Kobayashi, K., et al: ‘Breakdown voltage instability mechanism and improving ruggedness in trench field plate power MOSFET’. 2016 28th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Prague, Czech Republic, 2016, pp. 215218.
    57. 57)
      • 57. Yedinak, J., Stokes, R., Probst, D., et al: ‘Avalanche instability in oxide charge balanced power MOSFETS’. 2011 IEEE 23rd Int. Symp. on Power Semiconductor Devices and ICs, 2011, pp. 156159.
    58. 58)
      • 58. Hossain, Z., Burra, B., Sellers, J., et al: ‘Process & design impact on BVDSS stability of a shielded gate trench power MOSFET’. 2014 IEEE 26th Int. Symp. on Power Semiconductor Devices & IC's (ISPSD), San Diego, CA, USA, 2014, pp. 378381.
    59. 59)
      • 59. Lai, Y., Wynne, B.: ‘Ruggedness evaluation of low voltage trench MOSFET against repetitive avalanche’. PCIM Asia, Shanghai, People's Republic of China, 2018.
    60. 60)
      • 60. Chang, M.-H.., Rutter, P.: ‘Optimizing the trade-off between the RDS(on) of power MOSFETs and linear mode performance by local modification of MOSFET gain’. 2016 28th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Prague, Czech Republic, 2016, pp. 379382.
    61. 61)
      • 61. Bach, K.H., Asam, M., Kanert, W.: ‘Failure mechanisms of low-voltage trench power MOSFETs under repetitive avalanche condition’. 2012 24th Int. Symp. on Power Semiconductor Devices and ICs, Bruges, Belgium, 2012, pp. 113115.
    62. 62)
      • 62. Bernoux, B., Escoffier, R., Jalbaud, P., et al: ‘Source electrode evolution of a low voltage power MOSFET under avalanche cycling’, Microelectron. Reliab., 2009, 49, pp. 13411345.
    63. 63)
      • 63. Spirito, P., Breglio, G., d'Alessandro, V., et al: ‘Analytical model for thermal instability of low voltage power MOS and S.O.A. in pulse operation’. Proc. 14th Int. Symp. on Power Semiconductor Devices and ICs, Santa Fe, NM, USA, 2002, pp. 269272.
    64. 64)
      • 64. Consoli, A., Gennaro, F., Testa, A., et al: ‘Thermal instability of low voltage power-MOSFETs’, IEEE Trans. Power Electron., 2000, 15, (3), pp. 575581.
    65. 65)
      • 65. Dibra, D., Stecher, M., Decker, S., et al: ‘On the origin of thermal runaway in a trench power MOSFET’, IEEE Trans. Electron Devices, 2011, 58, (10), pp. 34773484.
    66. 66)
      • 66. Alatise, O., Kennedy, I., Petkos, G., et al: ‘Understanding linear-mode robustness in low-voltage trench power MOSFETs’, IEEE Trans. Device Mater. Reliab., 2010, 10, (1), pp. 123129.
    67. 67)
      • 67. Su, Y., Bobde, M., Lui, S., et al: ‘A comparison of close-cell, stripe-cell, and orthogonal-cell low voltage superjunction trench power MOSFETs for linear mode application’. 2018 IEEE 30th Int. Symp. on Power Semiconductor Devices and ICs (ISPSD), Chicago, IL, USA, 2018, pp. 327330.
    68. 68)
      • 68. www.nexperia.com/products/mosfets/family/nextpower-live/, accessed 16th July 2019.
    69. 69)
      • 69. Datasheet for the PSMNR58-30YLH. Available at https://assets.nexperia.com/documents/data-sheet/PSMNR58-30YLH.pdf, accessed 16th July 2019.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-pel.2019.0284
Loading

Related content

content/journals/10.1049/iet-pel.2019.0284
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address