http://iet.metastore.ingenta.com
1887

Analysis of drain current saturation behaviour in GaN polarisation super junction HFETs

Analysis of drain current saturation behaviour in GaN polarisation super junction HFETs

For access to this article, please select a purchase option:

Buy article PDF
$19.95
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
IET Power Electronics — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

The magnitude of saturation current in a power device significantly impacts its short-circuit capability. In conjunction with the unprecedented miniaturisation that gallium nitride (GaN) offers, there is a compelling rationale to examine this critical parameter in GaN transistors for thermally stable and reliable power converter applications. This study presents a comprehensive analysis of the physical behaviour that yields intrinsically low drain current saturation in GaN polarisation super junction heterojunction field-effect transistors (PSJ HFETs). The analysis in this work has been performed using electrical characterisation data of conventional and PSJ HFETs, supported by physics-based two-dimensional device simulations. Insight is gained on the differing device architecture-dependent mechanisms that determine the magnitude of drain current density in both types of devices when biased in the saturation region.

References

    1. 1)
      • 1. Zhang, N.-Q., Keller, S., Parish, G., et al: ‘High breakdown GaN HEMT with over lapping gate structure’, IEEE Electron Device Lett., 2000, 21, (9), pp. 421423.
    2. 2)
      • 2. Saito, W., Nitta, T., Kakiuchi, Y., et al: ‘Suppression of dynamic on resistance increase and gate charge measurements in high-voltage GaN-HEMTs with optimized field-plate structure’, IEEE Trans. Electron Devices, 2007, 54, (8), pp. 18251830.
    3. 3)
      • 3. Medjdoub, F., Derluyn, J., Cheng, K., et al: ‘Low on-resistance high-breakdown normally off AlN/GaN/AlGaN DHFET on Si substrate’, IEEE Electron Device Lett., 2010, 31, (2), pp. 111113.
    4. 4)
      • 4. Ikeda, N., Niiyama, Y., Kambayashi, H., et al: ‘Gan power transistors on Si substrates for switching application’, Proc. IEEE, 2010, 98, (7), pp. 11511161.
    5. 5)
      • 5. Nakajima, A., Sumida, Y., Dhyani, M.H., et al: ‘GaN-based super heterojunction field effect transistors using the polarisation junction concept’, IEEE Electron Device Lett., 2011, 32, (4), pp. 542544.
    6. 6)
      • 6. Nakajima, A., Dhyani, M.H., Sumida, Y., et al: ‘Gan based super HFETs over 700 V using the polarisation junction concept’. Proc. 23rd Int. Symp. Power Semiconductor Devices & ICs, San Diego, 2011, pp. 280283.
    7. 7)
      • 7. Nakajima, A., Unni, V., Menon, K.G., et al: ‘GaN-based bidirectional super HFETs using polarization junction concept on insulator substrate’. Proc. 24th Int. Symp. Power Semiconductor Devices & ICs, 2012, pp. 265268.
    8. 8)
      • 8. Unni, V., Long, H., Sweet, M., et al: ‘2.4 kV GaN polarisation superjunction schottky barrier diodes on semi-insulating 6H-SiC substrate’. Proc. 26th Int. Symp. Power Semiconductor Devices & ICs, Waikoloa, Hawaii, 15–19 June 2014, pp. 245248.
    9. 9)
      • 9. Kawai, H., Yagi, S., Hirata, S., et al: ‘Low cost high voltage GaN polarization superjunction field effect transistors’, Phys. Status Solidi A, Appl. Mater. Sci., 2017, 214, pp. 960961.
    10. 10)
      • 10. Baliga, B.J.: ‘Fundamentals of power semiconductor devices’ (Springer, New York, 2008).
    11. 11)
      • 11. Huang, X., Lee, D.Y., Bondarenko, V., et al: ‘Experimental study of 650 V AlGaN/GaN HEMT short-circuit safe operating area (SCSOA)’. Proc. 26th Int. Symp. Power Semiconductor Devices & IC's, 2014, pp. 273276.
    12. 12)
      • 12. Cortés, I., Fernández-Martínez, P., Flores, D., et al: ‘Superjunction LDMOS on thick-SOI technology for RF applications’, Microelectron. J., 2008, 39, pp. 922927.
    13. 13)
      • 13. Radhakrishnan, K., Dharmarasu, N., Sun, Z., et al: ‘Demonstration of AlGaN/GaN high-electron-mobility transistors on 100 mm diameter Si(111) by plasma-assisted molecular beam epitaxy’, Appl. Phys. Lett., 2010, 97, pp. 232107-1232107-3.
    14. 14)
      • 14. SILVACO ATLAS, TCAD Examples – GANFET. Available at: http://www.silvaco.com/examples/tcad/section20/example3/index.html.
    15. 15)
      • 15. Kaufmann, U., Schlotter, P., Obloh, H., et al: ‘Hole conductivity and compensation in epitaxial GaN: Mg layers’, Phys. Rev., 2000, B 62, pp. 1086710872.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-pel.2018.5583
Loading

Related content

content/journals/10.1049/iet-pel.2018.5583
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address