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Analysing the effects due to discontinuous output-voltage ripple in a digitally current-mode controlled boost converter

Analysing the effects due to discontinuous output-voltage ripple in a digitally current-mode controlled boost converter

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Digital implementation of current-mode control (CMC) considers the outer voltage-loop in the digital domain, whereas the inner current-loop is kept either in the analogue domain in mixed-signal CMC (MCMC) or in the digital domain in fully digital CMC (DCMC). Under finite voltage-loop sampling, this study reports that the selection of sampling point can completely change the stability status of a boost converter with non-minimum phase behaviour, particularly in the presence of the effective-series-resistance of the output capacitor. A discrete-time framework is proposed for fast-scale stability analysis in a boost converter, operating under continuous conduction mode. Further, discrete-time small-signal models are derived and design guidelines are proposed for both MCMC and DCMC architectures with enhanced stability for fast transient performance. Keeping in mind software-controlled DCMC, a considerably large sampling delay is considered, and its effect on the performance and stability is discussed. A boost converter prototype is tested and various DCMC schemes along the proposed design techniques are implemented using a field-programmable-gate-array device.

References

    1. 1)
      • 1. Chen, J., Prodic, A., Erickson, R.W., et al: ‘Predictive digital current programmed control’, IEEE Trans. Power Electron., 2003, 18, (1), pp. 411419.
    2. 2)
      • 2. Olalla, C., Leyva, R., Queinnec, I., et al: ‘Robust gain-scheduled control of switched-mode DC–DC converters’, IEEE Trans. Power Electron., 2012, 27, (6), pp. 30063019.
    3. 3)
      • 3. Kang, S.H., Maksimovic, D., Cohen, I.: ‘Efficiency optimization in digitally controlled flyback DC–DC converters over wide ranges of operating conditions’, IEEE Trans. Power Electron., 2012, 27, (8), pp. 37343748.
    4. 4)
      • 4. Balogh, L.: ‘A practical introduction to digital power supply control’, Texas Instrum. Appl. Note, 2005, pp. 629.
    5. 5)
      • 5. Maksimovic, D., Zane, R., Erickson, R.W.: ‘Impact of digital control in power electronics’. Proc. of the 16th Int. Symp. on Power Semiconductor Devices & ICs, 2004.
    6. 6)
      • 6. Erickson, R.W., Maksimovic, D.: ‘Fundamentals of power electronics’ (Springer, New Delhi, India, 2005).
    7. 7)
      • 7. Zhou, G., Xu, J., Jin, Y.: ‘Improved digital peak current predictive control for switching DC–DC converters’, IET Power Electron., 2011, 4, (2), pp. 227234.
    8. 8)
      • 8. Chattopadhyay, S., Das, S.: ‘A digital current-mode control technique for DC–DC converter’, IEEE Trans. Power Electron., 2006, 21, (6), pp. 17181726.
    9. 9)
      • 9. Kapat, S.: ‘Selectively sampled subharmonic-free digital current mode control using direct duty control’, IEEE Trans. Cir. Syst. II, 2015, 62, (3), pp. 311315.
    10. 10)
      • 10. Taeed, F., Nymand, M.: ‘A novel high performance and robust digital peak current mode controller for DC–DC converters in CCM’. 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics (COMPEL), 2014.
    11. 11)
      • 11. Taeed, F., Nymand, M.: ‘High-performance digital replica of analogue peak current mode control for DC–DC converter’, IET Power Electron., 2016, 9, (4), pp. 809816.
    12. 12)
      • 12. Carrejo, C.E., Vidal-Idiarte, E., Giral, R., et al: ‘Predictive digital interpolation current control for DC–DC power converters’, IET Power Electron., 2009, 2, (5), pp. 545554.
    13. 13)
      • 13. Ferdowsi, M.: ‘An estimative current mode controller for DC–DC converters operating in continuous conduction mode’. Proc. Applied Power Electronics Conf. and Exposition, 2006, pp. 11331136.
    14. 14)
      • 14. He, D., Nelms, R.M.: ‘Peak current-mode control for a boost converter using an 8-bit microcontroller’. Proc. PESC, 2, IEEE, 2003, pp. 938943.
    15. 15)
      • 15. Trescases, O., Prodic, A., Ng, W.T.: ‘Digitally controlled current-mode DC–DC converter IC’, IEEE Trans. Circuit Syst. I, 2011, 58, (1), pp. 219231.
    16. 16)
      • 16. Hallworth, M., Shirsavar, S.A.: ‘Microcontroller-based peak current mode control using digital slope compensation’, IEEE Trans. Power Electron., 2012, 27, (7), pp. 33403351.
    17. 17)
      • 17. Corradini, L., Maksimovic, D., Mattavelli, P., et al: ‘Digital control of high-frequency switched-mode power converters’ (John Wiley & Sons, Hoboken, New Jersey, USA, 2015).
    18. 18)
      • 18. Yousefzadeh, V., Shirazi, M., Maksimovic, D.: ‘Minimum phase response in digitally controlled boost and flyback converters’. Proc. APEC, 2007, pp. 865870.
    19. 19)
      • 19. Tse, C.K.: ‘Complex behavior of switching power converters’ (CRC press, New York, USA, 2003).
    20. 20)
      • 20. Chan, W.C.Y., Tse, C.K.: ‘Study of bifurcations in current-programmed DC/DC boost converters: from quasiperiodicity to period-doubling’, IEEE Trans. Circuit Syst. I, 1997, 44, (12), pp. 11291142.
    21. 21)
      • 21. Wang, F., Zhang, H., Ma, X.: ‘Analysis of slow-scale instability in boost PFC converter using the method of harmonic balance and Floquet theory’, IEEE Trans. Circuit Syst. I, 2010, 57, (2), pp. 405414.
    22. 22)
      • 22. Abusorrah, A., Mandal, K., Giaouris, D., et al: ‘Avoiding instabilities in power electronic systems: toward an on-chip implementation’, IET Power Electron., 2017, 10, (13), pp. 17781787.
    23. 23)
      • 23. Li, J., Lee, F.C.: ‘New modeling approach for current-mode control’. Proc. IEEE APEC, 2009, pp. 305311.
    24. 24)
      • 24. Li, Y., Vannorsdel, K.R., Zirger, A.J., Norris, M., et al: ‘Current mode control for boost converters with constant power loads’, IEEE Trans. Cir. Syst. I, 2012, 59, (1), pp. 198206.
    25. 25)
      • 25. Bryant, B., Kazimierczuk, M.K.: ‘Modeling the closed-current loop of PWM boost DC–DC converters operating in CCM with peak current-mode control’, IEEE Trans. Circuit Syst. I, 2005, 52, (11), pp. 24042412.
    26. 26)
      • 26. Kondrath, N., Kazimierczuk, M.K.: ‘Control current and relative stability of peak current-mode controlled pulse-width modulated DC–DC converters without slope compensation’, IET Power Electron., 2010, 3, (6), pp. 936946.
    27. 27)
      • 27. Fang, C.-C., Redl, R.: ‘Subharmonic instability limits for the peak-current-controlled buck converter with closed voltage feedback loop’, IEEE Trans. Power Electron., 2015, 30, (2), pp. 10851092.
    28. 28)
      • 28. Fang, C.-C., Redl, R.: ‘Subharmonic instability limits for the peak-current-controlled boost, buck-boost, flyback, and sepic converters with closed voltage feedback loop’, IEEE Trans. Power Electron., 2016, 32, (5), pp. 40484055.
    29. 29)
      • 29. Aroudi, A.El.: ‘A new approach for accurate prediction of subharmonic oscillation in switching regulators – part I: mathematical derivations’, IEEE Trans. Power Electron., 2017, 32, (7), pp. 56515665.
    30. 30)
      • 30. Aroudi, A.El.: ‘A new approach for accurate prediction of subharmonic oscillation in switching regulators – part II: case studies’, IEEE Trans. Power Electron., 2017, 32, (7), pp. 58355849.
    31. 31)
      • 31. Singha, A.K., Kapat, S., Banerjee, S., et al: ‘Nonlinear analysis of discretization effects in a digital current mode controlled boost converter’, IEEE J. Emerg. Sel. Top. Circuits Syst., 2015, 5, (3), pp. 336344.
    32. 32)
      • 32. Singha, A.K., Kapat, S.: ‘A unified framework for analysis and design of a digitally current-mode controlled buck converter’, IEEE Trans. Circuit Syst. I, 2016, 63, (11), pp. 20982107.
    33. 33)
      • 33. Cuk, S., Middlebrook, R.D.: ‘Modelling, analysis and design of switching converters’, 1978.
    34. 34)
      • 34. Rodriguez, E., Aroudi, A.El., Guinjoan, F., et al: ‘A ripple-based design-oriented approach for predicting fast-scale instability in DC–DC switching power supplies’, IEEE Trans. Circuit Syst. I, 2012, 59, (1), pp. 215227.
    35. 35)
      • 35. Giaouris, D., Maity, S., Banerjee, S., et al: ‘Application of filippov method for the analysis of subharmonic instability in DC–DC converters’, Int. J. Circuit Theory Appl., 2009, 37, (8), pp. 899919.
    36. 36)
      • 36. Jury, E.I.: ‘A simplified stability criterion for linear discrete systems’, Proc. IEEE IRE, 1962, 50, (6), pp. 14931500.
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