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Common-emitter topology of multilevel current-source pulse width modulation inverter with chopper-based DC current sources

Common-emitter topology of multilevel current-source pulse width modulation inverter with chopper-based DC current sources

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The study proposes a new circuit configuration of multilevel current-source inverter (CSI). In this new multilevel CSI topology, all power switching devices of the inverter are connected at a common-emitter point or at a common-potential line. Hence, all the power switches need only a single gate drive power supply without using isolated power supplies or conventional bootstrap techniques. This feature is still valid even if the number of the power switches increases owing to the higher-level number of the output current waveform. As a result, complexity of the gate drive circuit can be remarkably moderated. In addition, the multilevel CSI circuit is more capable to operate at high switching frequency if required, because all the power switches are connected at a common potential level. A five-level pulse width modulation inverter configuration, including chopper circuits as DC current-power source circuits using small smoothing inductors, is verified through computer simulations and experimental tests. The results show feasibility of the proposed multilevel inverter topology with reducing the complexity of the gate drive circuits, the inductor size, total harmonic distortion (TMD) of output current and increasing the efficiency of the multilevel CSI.

References

    1. 1)
    2. 2)
    3. 3)
    4. 4)
      • Noguchi, T., Suroso, : `New topologies of multi-level power converter for use of next-generation ultra high speed switching devices', Proc. IEEE Energy Conversion Congress & Expo., 2009, p. 1968–1975.
    5. 5)
    6. 6)
    7. 7)
    8. 8)
    9. 9)
    10. 10)
    11. 11)
    12. 12)
    13. 13)
      • Iwaya, K., Noguchi, T.: `High-frequency switched mode power amplifier with small capacity filter inverters', Proc. IEEE Annual Conf. on Industrial Electronics Society (IECON), 2004, p. 35–40.
    14. 14)
      • Liu, C., Xu, D., Jun, L.: `Three-phase current-source buck type PFC converter with reverse-blocking IGBTs', Proc. Power Electronics Specialist Conf., 2007, p. 1331–1335.
    15. 15)
    16. 16)
    17. 17)
    18. 18)
    19. 19)
      • B. Wu . (2006) High Power Converters and AC Drives.
    20. 20)
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