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Highly efficient wideband parallel-circuit class-E/F3 power amplifier's design methodology

Highly efficient wideband parallel-circuit class-E/F3 power amplifier's design methodology

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This article proposes a simple method of designing a highly efficient wideband parallel-circuit (PC) class-E/F3 power amplifiers (PAs). A combination of the double-reactance compensation technique and fundamental as well as third-harmonic series-tuned resonators is used for the design of the PC class-E/F3 PA output matching network. The step-by-step design flow and corresponding equations to calculate each component's value are also presented. Based on this method, the simulated optimal impedances of the reactance compensation network present almost a constant over the desired band, which satisfies the requirement of the wideband performance. Measured results reveal that using a GaN high electron mobility transistor (HEMT), the fabricated PA demonstrates the measured drain efficiencies of 60.1–80.5%, as well as output powers of 36.0–40.9 dBm from 350 to 730 MHz (fractional bandwidth = 70.4%).

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