DSS modulator using the SIDO dc−dc converter for the CMOS RF PA integrated circuit

DSS modulator using the SIDO dc−dc converter for the CMOS RF PA integrated circuit

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A dynamic supply switching (DSS) modulator using a single-inductor dual-output (SIDO) dc−dc converter for complimentary metal-oxide semiconductor (CMOS) radio frequency (RF) power amplifier (PA) integrated circuits is presented. The DSS modulator consists of the SIDO dc−dc converter and a supply switching circuit (SSC). The SIDO dc−dc converter requires only one off-chip inductor while generating two of the dc voltages. The SSC dynamically switches the high and low dc voltages according to the modulated signal envelope. The supply switching control voltage, which is generated from the envelope, is optimised for maximum efficiency improvement. The proposed DSS PA using the SIDO dc−dc converter and the SSC was fabricated using a 0.18 μm CMOS process for a 1.75 GHz frequency band and a long-term evolution (LTE) application. For the LTE 16-QAM signal with the peak-to-average power ratio (PAPR) of 7.5 dB, the measured efficiency of the DSS PA is 33.8% at the average output power of 21 dBm, thereby satisfying the adjacent channel leakage power ratio (ACLR) level of −30.1 dBc. The measured efficiency of the DSS PA at an average output power of 15 dBm is 24.8%, which is higher than that of the stand-alone PA by 13.3%.

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