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Linearity improvement using a modified derivative superposition method in cascaded stages amplifier

Linearity improvement using a modified derivative superposition method in cascaded stages amplifier

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A modified derivative superposition (DS) method using cascaded stages transistor is described. It uses the third order intermodulation (IMD3) current generated from the preceding stage to cancel those at the output of the following stage. This analysis demonstrates that an IMD3 minimum occurs near the output power compression point. A balanced X-band linear power amplifier (PA) monolithic microwave integrated circuit (MMIC) using this concept is presented. The results of measurement showed a carrier-to-IMD3 ratio (C/I3) improvement more than 30 dB compared with the conventional cascaded stages configuration.


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