Hierarchical parallel dynamic estimator of states for interconnected power system

Sreenath Jayakumar Geetha; Saikat Chakrabarti; Ketan Rajawat

Hierarchical parallel dynamic estimator of states for interconnected power system

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Author(s): Sreenath Jayakumar Geetha¹ ; Saikat Chakrabarti¹ ; Ketan Rajawat¹
- Affiliations: 1: Department of Electrical Engineering , Indian Institute of Technology Kanpur , Kanpur, UP 208016 , India
Source: Volume 12, Issue 10, 29 May 2018, p. 2299 – 2306
DOI: 10.1049/iet-gtd.2017.1733 , Print ISSN 1751-8687, Online ISSN 1751-8695

Received 01/11/2017, Accepted 15/02/2018, Revised 24/01/2018, Published 16/02/2018

Real-time visualisation of large power systems, by tracking the system states, is a challenging task as it involves processing a large measurement set to obtain the system states. This study proposes a hierarchical parallel dynamic estimation algorithm to estimate the states of a large-scale interconnected power system. The power system is decomposed into smaller subsystems, which is processed in parallel to obtain a reduced order state estimate. This information is then transmitted to the central processor, which collates the individual reduced order estimates to obtain the global estimates. Each processor uses state matrix of smaller dimension, thereby reducing the computational burden. The low-level processors utilise only a fraction of the global measurements in the proposed approach, and there is no need for any information exchange from the central processor to the low level processors, which helps in reducing the communication requirements. Moreover, detection of anomalies can also be carried out at the local processors without the need for any separate bad data detection at the central processor. IEEE 30- and 118-bus systems are used as test beds to study the proposed approach.

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