access icon free Fast and robust software-based digital phase-locked loop for power electronics applications

© The Institution of Engineering and Technology
Received 22/01/2013, Accepted 05/05/2013, Revised 12/04/2013, Published

In this study, a fast and fully software-based algorithm for digital phase-locked loop (PLL) is proposed via a new hybrid approach in software and hardware by using an advanced digital signal processor architecture. The proposed algorithm is robust against line disturbances such as phase-angle jump, voltage sag, third harmonic injection, multi-zero crossing and step change in frequency at the input voltage. Performance and robustness of the proposed method are investigated through experimental studies. Furthermore, it is compared with three different PLL algorithms in detail to show its superiority over existing methods.

Inspec keywords: digital signal processing chips; power electronics; digital phase locked loops; power engineering computing

Other keywords: power electronics applications; digital phase-locked loop; PLL algorithms; phase-angle jump; multizero crossing; third harmonic injection; line disturbances; hybrid approach; step change; voltage sag; advanced digital signal processor architecture; software-based algorithm

Subjects: Power convertors and power supplies to apparatus; Power engineering computing; Power electronics, supply and supervisory circuits

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