Sampling and controlling faster than the computational delay

Sampling and controlling faster than the computational delay

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For a sampled-data control system, the authors propose to choose the time between samples to be shorter than the computational delay involved in computing the control signal, an approach called as intra-delay sampling. It is shown that, utilising a parallel computing architecture, this is indeed feasible and that intra-delay sampling schemes yield better performance than their slower sampling counterparts.


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