SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays
SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays
- Author(s): I.D.L. Anderson and M.A.S. Khalid
- DOI: 10.1049/iet-cdt:20070120
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- Author(s): I.D.L. Anderson 1 and M.A.S. Khalid 1
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View affiliations
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Affiliations:
1: Department of Electrical and Computer Engineering, Research Centre for Integrated Microsystems (RCIM), University of Windsor, Windsor, Canada
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Affiliations:
1: Department of Electrical and Computer Engineering, Research Centre for Integrated Microsystems (RCIM), University of Windsor, Windsor, Canada
- Source:
Volume 3, Issue 1,
January 2009,
p.
24 – 32
DOI: 10.1049/iet-cdt:20070120 , Print ISSN 1751-8601, Online ISSN 1751-861X
A genetic algorithm-based design space exploration technique using parameterised cores is examined. A computer-aided design tool called SCBuild was developed which is capable of applying a genetic algorithm to a core's parameters, and generating hardware description language models of core variants. The tool can also compute estimates of a variant's area and critical path delay on a field-programmable gate array. Using this tool, several experiments were conducted using a soft-core processor with a large design space. It was concluded from these experiments that using a genetic algorithm to explore the design space of a parameterised core can help a designer make intelligent decisions regarding the assignment of values to the parameters of an embedded hardware platform.
Inspec keywords: microprocessor chips; field programmable gate arrays; hardware description languages; genetic algorithms; logic CAD
Other keywords:
Subjects: Optimisation techniques; Computer-aided logic design; Microprocessors and microcomputers; Computer-aided circuit analysis and design; Formal methods; Digital circuit design, modelling and testing; Logic circuits; Electronic engineering computing; Logic and switching circuits; Optimisation techniques; Microprocessor chips
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