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Finite state machine-based DRAM power management with early resynchronisation

Finite state machine-based DRAM power management with early resynchronisation

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An efficient operating system-based power management scheme for DRAM in the multiprogramming/time-sharing environment is presented. Formulas for evaluating the condition of positive energy gain are developed and a finite state machine (FSM) for selecting the best power mode for a given idle time is designed. In the proposed scheme, the scheduler selectively assigns the most efficient power mode to each idle memory bank at context switching time based on the FSM. For computing the idle time, two efficient and practical prediction methods are developed and tested for performance. The proposed scheme achieves further energy saving by starting the resynchronisation of idle memory banks as early as possible. In the aspects of the prediction method and the early resynchronisation method, multiple versions of the proposed scheme are developed and tested for performance. The proposed scheme utilises events occurring at context switching time in the multiprogramming/time-sharing environment and the scheduling ensures the maximum energy gain without significantly degrading the performance. The proposed scheme is tested with a simulated system, and the experimental results demonstrate the efficiency of the scheme. In the experiment, the energy gain by using the proposed scheme ranges from 17.84% to 52.21% depending on the time quantum sizes tested.

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