Embedded high-resolution delay measurement system using time amplification
Embedded high-resolution delay measurement system using time amplification
- Author(s): M.A. Abas ; G. Russell ; D.J. Kinniment
- DOI: 10.1049/iet-cdt:20060099
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- Author(s): M.A. Abas 1 ; G. Russell 1 ; D.J. Kinniment 1
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View affiliations
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Affiliations:
1: School of Electrical, Electronic and Computer Engineering, University of Newcastle upon Tyne, UK
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Affiliations:
1: School of Electrical, Electronic and Computer Engineering, University of Newcastle upon Tyne, UK
- Source:
Volume 1, Issue 2,
March 2007,
p.
77 – 86
DOI: 10.1049/iet-cdt:20060099 , Print ISSN 1751-8601, Online ISSN 1751-861X
The rapid pace of change in IC technology, specifically in the speed of operation, demands sophisticated design solutions for IC testing methodologies. Moreover, the current technology of System-on-Chip makes great demands on the accurate testing of internal timing parameters as access to internal nodes through input/output pins becomes more difficult. This work presents two high-resolution time measurement schemes for digital Built-in Self-Test (BIST) applications, namely: Two-Delay Interpolation Method and the Time Amplifier. The two schemes are subsequently combined to produce a novel design for BIST time measurement which offers two main advantages: a small time interval measurement capability which advances the state of the art and a small footprint, occupying 0.2 mm2 or equivalent to 3020 transistors, compared with a recent design which has the equivalent of 4800 transistors.
Inspec keywords: system-on-chip; time measurement; interpolation; delays; integrated circuit testing; built-in self test
Other keywords:
Subjects: Time measurement; Digital circuit design, modelling and testing; Interpolation and function approximation (numerical analysis); Interpolation and function approximation (numerical analysis); Microprocessor chips; Microprocessors and microcomputers
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