High performance physical random number generator
High performance physical random number generator
- Author(s): K.H. Tsoi ; K.H. Leung ; P.H.W. Leong
- DOI: 10.1049/iet-cdt:20050173
For access to this article, please select a purchase option:
Buy article PDF
Buy Knowledge Pack
IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.
Thank you
Your recommendation has been sent to your librarian.
- Author(s): K.H. Tsoi 1 ; K.H. Leung 1 ; P.H.W. Leong 1
-
-
View affiliations
-
Affiliations:
1: Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong
-
Affiliations:
1: Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong
- Source:
Volume 1, Issue 4,
July 2007,
p.
349 – 352
DOI: 10.1049/iet-cdt:20050173 , Print ISSN 1751-8601, Online ISSN 1751-861X
A field programmable gate array (FPGA) -based implementation of a physical random number generator (PRNG) is presented. The PRNG uses an alternating step generator construction to decorrelate an oscillator-phase-noise-based physical random source. The resulting design can be implemented completely in digital technology, requires no external components, is very small in area, achieves very high throughput and has good statistical properties. The PRNG was implemented on an FPGA device and tested using the NIST, Diehard and TestU01 random number test suites.
Inspec keywords: random number generation; phase noise; field programmable gate arrays; oscillators; logic testing
Other keywords:
Subjects: Digital arithmetic methods; Logic and switching circuits; Logic design methods; Logic circuits; Digital circuit design, modelling and testing; Oscillators
References
-
-
1)
- Tsoi, K., Leung, K., Leong, P.: `Compact FPGA-based true and pseudo random number generators', Proc. IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM), 2003, p. 51–61.
-
2)
- U.S. Department of Commerce, Security Requirements for Cryptographic Modules. Federal Information Processing Standards Publication FIPS 140-1 1994.
-
3)
- P. L'Ecuyer , R. Simard . TestU01: A C library for empirical testing of random number generators. ACM Trans. Math. Software
-
4)
- Golic, J., Menicocci, R.: `Edit distance correlation attack on the alternating step generator', Advances in Cryptology: Crypto '97, 1998, p. 499–512.
-
5)
- Zheng, K., Yeng, C., Rao, T.: `An improved linear syndrome algorithm in cryptanalysis with applications', Advances in Cryptology: Crypto '90, 1991, p. 34–47, LNCS 537.
-
6)
- Intel Platform Security Division: ‘The Intel random number generator’. Intel technical brief, 1999. ftp://download.intel.com/design/security/rng/techbrief.pdf.
-
7)
- Gerosa, A., Bernardini, R., Pietri, S.: `A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system', SSMSD. 2001 Southwest Symp. on Mixed-Signal Design, 2001, p. 87–92.
-
8)
- Leong, P.H.W., Leong, M.P., Cheung, O.Y.H., Tung, T., Kwok, C.M., Wong, M.Y., Lee, K.H.: `Pilchard – a reconfigurable computing platform with memory slot interface', Proc. IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM), 2001, p. 170–179.
-
9)
- A.J. Menezes , P.C. Van Oorschot , S.A. Vanstone . (1997) Handbook of applied cryptography.
-
10)
- Fischer, V., Drutarovsky, M.: `True random number generator embedded in reconfigurable hardware', Proc. Cryptographic Hardware and Embedded Systems Workshop (CHES), 2002, p. 415–430.
-
11)
- Xilinx Virtex 2.5 V field programmable gate arrays 2000.
-
12)
- B. Razavi . A study of phase noise in CMOS oscillators. IEEE J. Solid-State Circuits , 331 - 343
-
13)
- T. Stojanovski , J. Pil , L. Kocarev . Chaos-based random number generators. Part II: practical realization. IEEE Trans. Circuits Syst. – I: Fundam. Theory Appl. , 382 - 385
-
14)
- Fairfield, R.C., Mortenson, R.L., Coulthart, K.B.: `An LSI random number generator (RNG)', Advances in Cryptography: Proc. of Crypto 84, 1984, Springer-Verlag, p. 203–230, LNCS 0196.
-
15)
- C. Petrie , J. Connelly . A noise-based IC random number generator for applications in cryptography. IEEE J. Solid-State Circuits , 5 , 615 - 621
-
16)
- White paper by Cryptographic Research Inc., Jun, B., Kocher, P.: `The Intel random number generator', 1999, ftp://download.intel.com/design/security/rng/CRIwp.pdf.
-
17)
- Gunther, C.: `Alternating step generators controlled by de Bruijn sequences', Advances in Cryptology: Proc. Eurocrypt, 1988, 87, p. 5–14.
-
18)
- NIST Special Publication 800-22, Rukhin el., A.: `A statistical test suit for random and pseudorandom number generators for cryptographic applications', 2001.
-
19)
- D. Eastlake , S. Crocker , J. Schiller . Randomness recommendations for security. Network Working Group
-
1)
Related content
