Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

access icon free Ultra-low power digital front-end for single lead ECG acquisition integrated with a time-to-digital converter

© The Institution of Engineering and Technology
Received 31/01/2019, Accepted 08/05/2019, Revised 05/05/2019, Published 11/06/2019

A low power single lead electrocardiogram front-end acquisition system in 0.18 μm CMOS operating at 0.5 V is presented here. The analogue blocks in low noise amplifier (LNA), filters and passive elements that perform amplification and DC offset cancellation are replaced by a moving average voltage to time converter (MA-VTC) to get amplification and anti-aliasing in the time domain. A digital feedback algorithm is used to cancel out the DC offset. The front-end structure is designed in the sub-threshold region of MOS to reduce the power consumption in the circuit. The proposed architecture consumes 50 nW of power with a gain of 670 μs/V. The output of the front-end is fed to an all digital time-to-digital converter (TDC) that operates in the near threshold region with a resolution of 586.4 ps and 32.5 μW power consumption.

Inspec keywords: CMOS analogue integrated circuits; analogue-digital conversion; CMOS integrated circuits; low noise amplifiers; medical signal processing; low-power electronics; electrocardiography

Other keywords: low-power single lead electrocardiogram front-end acquisition system; CMOS; passive elements; time-to-digital converter; digital feedback algorithm; front-end structure; single lead ECG acquisition; power consumption

Subjects: Bioelectric signals; Electrodiagnostics and other electrical measurement techniques; Digital signal processing; Biology and medical computing; Electrical activity in neurophysiological processes; CMOS integrated circuits; Amplifiers

References

    1. 1)
      • 3. Muller, R., Gambini, S., Rabaey, J.: ‘A 0.013 mm2, 5 μw, DC-coupled neural signal acquisition IC with 0.5 V supply’, IEEE Solid-State Circuits, 2012, 47, (1), pp. 232–243.
    2. 2)
      • 14. Watanabe, T., Isomura, H.: ‘All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASIC’. Int. Sym. Circuits and Systems, Melbourne, Australia, June 2014, pp. 674–677.
    3. 3)
      • 5. Toinga, S., Carabali, C., Ortega, L.: ‘Development of a didactic platform for teaching the Einthoven's triangle’. Proc. Ecuador Technical Chapters Meeting (ETCM), Salinas, Ecuador, October 2017, pp. 1–6.
    4. 4)
      • 16. Li, Y., Mansano, A.L., Yuan, Y., et al: ‘An ECG recording front-end with continuous-time level-crossing sampling’, IEEE Trans. Biomed. Circuits Syst., 2014, 8, (5), pp. 626–635.
    5. 5)
      • 21. Prutchi, D., Norris, M.: ‘Design and development of medical electronic instrumentation: a practical perspective of the design, construction, and test of medical devices’ (John Wiley & Sons, Hoboken, NJ, USA, 2005).
    6. 6)
      • 12. Chen, P., Chen, C., Shen, Y.: ‘A low-cost low-power CMOS time-to-digital converter based on pulse stretching’, IEEE Trans. Nuclear Sci., 2006, 53, (4), pp. 2215–2220.
    7. 7)
      • 11. Li, G., Tousi, Y.M., Hassibi, A., et al: ‘Delay-line-based analog-to-digital converters’, IEEE Trans. Circuits Syst. II: Express Briefs, 2009, 56, (6), pp. 464–468.
    8. 8)
      • 7. Das, P., Hossain, M., Park, J.: ‘Chemically reduced graphene oxide-based dry electrodes as touch sensor for electrocardiograph measurement’, Microelectron. Eng., 2017, 180, pp. 45–51.
    9. 9)
      • 20. Pokhara, A., Agrawal, J., Mishra, B.: ‘Design of an all-digital, low power time-to-digital converter in 0.18 μm CMOS’. Int. Sym. Embedded Computing and System Design, West Bengal, India, December 2017, pp. 1–5.
    10. 10)
      • 6. Iskandar, A., Kolla, R., Schilling, K., et al: ‘A wearable 1-lead necklace ecg for continuous heart rate monitoring’. Int. Conf. e-Health Networking, Applications and Services (Healthcom), Munich, Germany, September 2016, pp. 1–4.
    11. 11)
      • 19. Mishra, B., Botteron, C., Tasselli, G., et al: ‘A sub-μa power management circuit in 0.18μm CMOS for energy harvesters’. Proc. Design Automation and Test in Europe, Grenoble, France, March 2013, pp. 1197–1202.
    12. 12)
      • 17. Mohan, R., Zaliasl, S., Gielen, G., et al: ‘A 0.6v, 0.015-mm2, time-based ECG readout for ambulatory applications in 40-nm CMOS’, IEEE J. Solid-State Circuits, 2017, 52, (1), pp. 298–308.
    13. 13)
      • 13. Park, Y., Wentzloff, D.: ‘A cyclic vernier TDC for ADPLLs synthesized from a standard cell library’, IEEE Trans. Circuits Syst. I: Regul. Pap., 2011, 58, (7), pp. 1511–1517.
    14. 14)
      • 8. Yang, Y., Yang, Z., Zhu, Z., et al: ‘An active dry electrode ECG interface circuit for wearable sensors’, Microelectron. J., 2017, 69, pp. 86–90.
    15. 15)
      • 1. Zou, X., Xu, X., Yao, L., et al: ‘A 1-v 450-nw fully integrated programmable biomedical sensor interface chip’, IEEE Solid-State Circuits, 2009, 44, (4), pp. 1067–1077.
    16. 16)
      • 18. Lin, S., Lin, F., Cheng, N., et al: ‘A 0.8v, 43.5 μw ECG signal acquisition IC with a referenceless time-to-digital converter’. Int. Sym. Circuits and Systems, Montreal, Canada, May 2016, pp. 1066–1069.
    17. 17)
      • 2. Rezaee-Dehsorkh, H., Ravanshad, N., Lotfi, R., et al: ‘Analysis and design of tunable amplifiers for implantable neural recording applications’, IEEE Emerg. Sel. Top. Circuits Syst., 2011, 1, (4), pp. 546–556.
    18. 18)
      • 10. Mostafa, H., Ismail, Y.: ‘Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (t-ADCs)’. Int. Conf. Electronics, Circuits, and Systems, Abu Dhabi, United Arab Emirates, May 2013, pp. 149–152.
    19. 19)
      • 15. Watanabe, T., Ohtsuka, Y., Akita, S., et al: ‘A time A-D converter LSI for accurate measurement of multitime-interval by digital processing’, Electron. Commun. Japan (Part II: Electron.), 1996, 79, (2), pp. 98–108.
    20. 20)
      • 4. Zare, M., Maymandi-Nejad, M.: ‘A fully digital front-end architecture for ECG acquisition system with 0.5 V supply’, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2016, 24, (1), pp. 256–265.
    21. 21)
      • 9. Degen, T., Torrent, S., Jackel, H.: ‘Low-noise two-wired buffer electrodes for bioelectric amplifiers’, IEEE Trans. Biomed. Eng., 2007, 54, (7), pp. 1328–1332.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cdt.2019.0027
Loading

Related content

content/journals/10.1049/iet-cdt.2019.0027
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
Print this page
This is a required field
Please enter a valid email address