In this study, the authors present a configurable architecture having gate count of $≃ 3.2 k$ and on the fly reconfigurability for low-power biomedical applications such as QRS detection, ExG processing etc. The proposed architecture is a light-weight co-processor that supports on-node digital signal and image processing functions potentially eliminating the power consumed by radios in wireless sensor node and body sensor network. The architecture consists of a 3 × 3 array of register units along with adaptive memory with configurable data path. The architecture can be configured on-the-fly for seven functions with the current memory structure. However, more number of functions can be targeted with increased memory. They demonstrate the realisation of Pan–Tompkins algorithm commonly used for QRS detection on the proposed architecture using the reconfigurability. This work offers $≈ 4 ×$ reduced area and $2.3 ×$ increase in performance with respect to the existing contemporary literature.

References

1. 1)
  - 6. Li, P., Zhang, X., Liu, M., et al: ‘A 410-nW efficient QRS processor for mobile ECG monitoring in 0.18-μm CMOS’, IEEE Trans. Biomed. Circuits Syst., 2017, 11, (6), pp. 1356–1365.
2. 2)
  - 5. Abdallah, R.A., Shanbhag, N.R.: ‘An energy-efficient ECG processor in 45-nm CMOS using statistical error compensation’, IEEE J. Solid-State Circuits, 2013, 48, (11), pp. 2882–2893.
3. 3)
  - 12. Jain, N., Mishra, B.: ‘CORDIC on a configurable serial architecture for biomedical signal processing applications’. Int. Symp. on VLSI Design and Test, Ahmedabad, India, June 2015, pp. 1–6.
4. 4)
  - 23. Li, Y., Yu, H., Jiang, L., et al: ‘Adaptive lifting scheme for ECG QRS complexes detection and its FPGA implementation’. Proc. Int. Conf. on Biomedical Engineering and Informatics, Yantai, China, October 2010, pp. 721–724.
5. 5)
  - 1. Pop, V., de Francisco, R., Pflug, H., et al: ‘Human++: wireless autonomous sensor technology for body area networks’. Proc. Asia and South Pacific Design Automation Conf., Yokohama, Japan, January 2011, pp. 561–566.
6. 6)
  - 17. Zhang, F., Tan, J., Lian, Y.: ‘An effective QRS detection algorithm for wearable ECG in body area network’. Proc. Biomedical Circuits and Systems Conf., Montreal, Canada, November 2007, pp. 2920–2923.
7. 7)
  - 11. Pan, J., Tompkins, W.: ‘A real-time QRS detection algorithm’, IEEE Trans. Biomed. Eng., 1985, 1, (3), pp. 230–236.
8. 8)
  - 18. Pavlatos, C., Dimopoulos, A., Manis, G., et al: ‘Hardware implementation of PAN and Tompkins QRS detection algorithm’. Proc. European Medicine and Biology Society Conf., Prague, Czech Republic, November 2005, pp. 213–216.
9. 9)
  - 19. Stojanović, R., Karadaglić, D., Mirković, M., et al: ‘A FPGA system for QRS complex detection based on integer wavelet transform’, Meas. Sci. Rev., 2011, 11, (4), pp. 131–138.
10. 10)
  - 2. Kwong, J.: ‘Low-voltage embedded biomedical processor design’. PhD thesis, Massachusetts Institute of Technology, 2010.
11. 11)
  - 21. Alemzadeh, H., Jin, Z., Kalbarczyk, Z., et al: ‘An embedded reconfigurable architecture for patient-specific multi-parameter medical monitoring’. Proc. Annual Int. Conf. on Engineering in Medicine and Biology Society, Boston, USA, August 2011, pp. 1896–1900.
12. 12)
  - 16. Ieong, C.I., Vai, M.I., Mak, P.U.: ‘ECG UQRS complex detection with programmable hardware’. Proc. Annual Int. Conf. on Engineering in Medicine and Biology Society, Vancouver, Canada, August 2008, pp. 2920–2292.
13. 13)
  - 20. Zairi, H., Talha, M.K., Benouar, S., et al: ‘Intelligent system for detecting cardiac arrhythmia on FPGA’. Proc. Int. Conf. on Information and Communication Systems, Irbid, Jordan, April 2014, pp. 1–5.
14. 14)
  - 8. Mishra, B., Al Hashimi, B.M.: ‘Subthreshold FIR filter architecture for ultra low power applications’, in Svensson, L., Monteiro, J. (Ed.): ‘Integrated circuit and system design: power and timing modeling, optimization and simulation’ (Springer, Berlin, Germany, 2009), vol. 5349, pp. 1–10.
15. 15)
  - 10. Kleiger, R.E., Stein, P.K., Bigger, J.T.: ‘Heart rate variability: measurement and clinical utility’, Annu. Noninvasive Electrocardiol., 2005, 10, (1), pp. 88–101.
16. 16)
  - 14. Moody, G.B., Mark, R.G.: ‘The impact of the MIT-BIH arrhythmia database’, IEEE Eng. Med. Biol. Mag., 2001, 20, (3), pp. 45–50.
17. 17)
  - 7. Ravanshad, N., Rezaee Dehsorkh, H., Lotfi, R., et al: ‘A level- crossing based QRS detection algorithm for wearable ECG sensors’, IEEE J. Biomed. Health Informatics, 2014, 18, (1), pp. 183–192.
18. 18)
  - 22. Chatterjee, H.K., Gupta, R., Bera, J.N., et al: ‘An FPGA implementation of real-time QRS detection’. Proc. Int. Conf. on Computer and Communication Technology, Allahabad, India, September 2011, pp. 274–279.
19. 19)
  - 13. Jain, N., Mishra, B.: ‘DCT and CORDIC on a novel configurable hardware’. Proc. Asia Pacific Conf. on Postgraduate Research in Microelectronics and Electronics, Hyderabad, India, November 2015, pp. 51–56.
20. 20)
  - 3. Kim, H., Yazicioglu, R.F., Torfs, T., et al: ‘An integrated circuit for wireless ambulatory arrhythmia monitoring systems’. Proc. Annual Int. Conf. on Engineering in Medicine and Biology Society, Minneapolis, USA, September 2009, pp. 5409–5412.
21. 21)
  - 4. Kim, H., Kim, S., Helleputte, N.V., et al: ‘A configurable and low-power mixed signal SoC for portable ECG monitoring applications’, IEEE Trans. Biomed. Circuits Syst., 2014, 8, (2), pp. 257–267.
22. 22)
  - 15. Shukla, A., Macchiarulo, L.: ‘A fast and accurate FPGA based QRS detection system’. Proc. Annual Int. Conf. on Engineering in Medicine and Biology Society, Vancouver, Canada, August 2008, pp. 4828–4831.
23. 23)
  - 9. Chandrakasan, A., Verma, N., Daly, D.C.: ‘Ultralow-power electronics for biomedical applications’, Annu. Rev. Biomed. Eng., 2008, 10, pp. 247–274.

Light-weight configurable architecture for QRS detection

References

Related content