Reducing the system standby power of a personal computer

Reducing the system standby power of a personal computer

For access to this article, please select a purchase option:

Buy article PDF
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Your details
Why are you recommending this title?
Select reason:
IET Computers & Digital Techniques — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

Most previous low-power personal computer designs have been either focused on power efficiency improvement or on software power management in the working states. This research aims to reduce the total standby power amount in the off state. The authors accomplish the goal of reducing the power consumption by a wake-up device which is replaced by a chip with a still lower consumption. The authors redesign the power circuit and cut off the power supply for the unnecessary chips, with the exception of the power needed for the specific chip used to wake up the system. The authors also turn off the power supply of the original power controller chip which is used to control the system's power status. In addition, the authors use another low-power chip instead of the original one and redesign the power sequence of the system in order to maintain the system's power state while the system's power status controller is turned off. Finally, as the authors use this low-power chip to manage the standby power source separately by means of the remote wake-up devices, the authors reduce further the standby power consumption to 4.4 mW in the power-off state by use of the various wake-up methods. The total result is an improvement of approximately 99.3%.


    1. 1)
    2. 2)
    3. 3)
      • 3. Levacq, D., Yazid, M., Kawaguchi, H., et al: ‘Half VDD clock-swing flip-flop with reduced contention for up to 60% power saving in clock distribution’. Int. Conf. of 33rd European Solid State Circuits, September 2007, pp. 190193.
    4. 4)
    5. 5)
      • 5. Wang, Q., Liu, Z., Wang, P., et al: ‘Design and implementation of low power consumption wireless pressure transmitter monitoring system’. Int. Conf. of Computational Intelligence and Software Engineering, December 2009, pp. 15.
    6. 6)
      • 6. Kwok, S.: ‘Power-saving algorithms in electricity usage -comparison between the power saving algorithms and machine learning techniques’. Int. Conf. of Innovative Technologies for an Efficient and Reliable Electricity Supply, September 2010, pp. 246251.
    7. 7)
    8. 8)
    9. 9)
    10. 10)
      • 10. Lee, Y., Seok, M., Hanson, S., et al: ‘Standby power reduction techniques for ultra-low power processors’. Int. Conf. of 34th European Solid-State Circuits, 2008, pp. 186189.
    11. 11)
      • 11. Rahman, H., Chakrabarti, C.: ‘A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage Circuits and Systems’. Int. Symp. on Circuits and Systems, May 2004, pp. 297300.
    12. 12)
    13. 13)
    14. 14)
    15. 15)
      • 15. Lien, C., Lin, C., Bai, Y., et al: ‘Remotely controllable outlet system for home power management’. Int. Symp. on Consumer Electronics, June 2006, pp. 16.
    16. 16)
    17. 17)
      • 17. Tsai, C., Bai, Y., Chu, C., et al: ‘Design and implementation of a socket with ultra-low standby power’. Int. Conf. of Int. Instrumentation and Measurement Technology, May 2011, pp. 12161221.
    18. 18)
    19. 19)
      • 19. US Environmental Protection Agency Climate Protection Partnerships: ‘ENERGY STAR Program Requirements for Computers’, 2006.
    20. 20)
      • 20. Official Journal of the European Union: ‘Implementing Directive 2005/32/EC of the European Parliament and of the Council with regard to ecodesign requirements for standby and off mode electric power consumption of electrical and electronic household and office equipment’, 2008.
    21. 21)
    22. 22)
      • 22. Lee, K., Lai, Y.: ‘Novel circuit design for two-stage AC/DC converter to meet standby power regulations’, Power Electron., 2009, 2, (6), pp. 625634.
    23. 23)
    24. 24)
    25. 25)
    26. 26)
    27. 27)
      • 27. Intel Corporation: ‘Huron River Platform, Rework Guide for Emerald Lake CRB Fab1 DSW Feature Enabling’, April 2010.
    28. 28)
      • 28. Hewlett-Packard, Intel, Microsoft, Phoenix and Toshiba: ‘Advance Configuration and Power Interface Specification Revision 5.0a’, November 2013.
    29. 29)
      • 29. Kang, D., Yoo, J., Lee, J.: ‘A new remote USB architecture for live migration of virtual machines in SoD (System on-Demand) service’. Int. Conf.s on Control Automation and Systems, October 2010, pp. 11431146.
    30. 30)
      • 30. Intel Corporation: ‘ATX Specification Version 2.2’, 2004.
    31. 31)
      • 31. Hu, Z.: ‘I2C protocol design for reusability’. Int. Symp. on Information Processing, October 2010, pp. 8386.

Related content

This is a required field
Please enter a valid email address