Characterisation of P floating islands for 150–200 V FLYMOSFETs
A vertical N-channel 150–200 V FLYMOSFET concept has been applied on silicon: its P-buried layer introduced in the N− epitaxial region, called ‘P floating island’, is the key factor for superior performance. A particular physical characterisation technique, scanning capacitance microscopy, is used on a power device to establish 2D and 3D island representation and to go beyond 1D information given by spreading resistance profiling. Experiments including four different boron implantations of P floating islands and two different spacings of the basic cell are conducted, because the form and the concentration of the floating islands and, moreover, the spacing between them directly impact the electrical performance. Concerning the electrical study, FLYMOSFET measurements show good ‘specific on-resistance/breakdown voltage’ (RON.S–BVdss) trade-offs, better than the conventional VDMOSFETs, and UIS ruggedness as good as superjunction MOSFETs.
