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access icon free Low-cost TRNG IPs

This study presents a low-cost multi-throughput true random number generator (TRNG) intellectual property (IP) based on a variable-length multi-mode ring oscillator. The proposed TRNG implements a multi-throughput feature by bypassing inverter cells in the ring oscillator for reducing the loop delay. This multi-throughput feature offers the advantage of high-performance or low-power operation when needed. These options make the proposed TRNG suitable for end-to-end encryption in highly restricted devices such as Internet of Things sensor nodes. Measurement results show that the proposed TRNG passes national institute of standards and technology (NIST) tests for different throughput operations. The TRNG is embedded in a reduced instruction set computer V (RISC-V)-based system-on-chip (SoC) for periodical-driven applications, and it achieves an energy efficiency of 92 pJ at 3.7 Mbps, occupying in a 180 nm technology. This study also presents a system technique to implement the entropy enhanced TRNGs, using multiple entropy sources. An extraction system provides high-quality random numbers with a sampling method that takes one entropy output to sample the other entropy sources. The system requires few resources, using low-cost TRNG IPs as entropy sources.

References

    1. 1)
      • 11. Lacharme, P.: ‘Post-processing functions for a biased physical random number generator’. Fast Software Encryption, University of Toulon, France, 2008, pp. 334342.
    2. 2)
      • 4. Mathew, S., Johnston, D., Newman, P., et al: ‘μRNG: A 300–950 mV 323 Gbps/W all-digital full-entropy true random number generator in 14 nm FinFET CMOS’. ESSCIRC Conf. 2015 – 41st European Solid-State Circuits Conf. (ESSCIRC), Graz, Austria, 2015, pp. 116119.
    3. 3)
      • 10. Bassham, L.E., Rukhin, A., Soto, J., et al: ‘A statistical test suite for random and pseudorandom number generators for cryptographic applications’, 2010, (April).
    4. 4)
      • 6. Mathew, S.K., Johnston, D., Satpathy, S., et al: ‘μRNG: a 300–950 mV, 323 Gbps/W all-digital full-entropy true random number generator in 14 nm FinFET CMOS’, IEEE J. Solid-State Circuits, 2016, 51, (7), pp. 16951704.
    5. 5)
      • 12. Do, A.T., Liu, X.: ‘25 fj/bit, 5 Mb/s, 0.3 V true random number generator with capacitively-coupled chaos system and dual-edge sampling scheme’. IEEE Asian Solid-State Circuits Conf., Gold Coast, Australia, 2017.
    6. 6)
      • 8. Chattopadhyay, E., Zuckerman, D.: ‘Explicit two-source extractors and resilient functions’, Electronic Colloquium on Computational Complexity, 2016, (119), pp. 653705.
    7. 7)
      • 1. Yang, K., Blaauw, D., Sylvester, D.: ‘An all-digital edge racing true random number generator robust against PVT variations’, IEEE J. Solid-State Circuits, 2016, 51, (4), pp. 10221031.
    8. 8)
      • 13. Nica, I.A., Savinescu, V.S., Goras, L.: ‘True random number generator using an active inductor based oscillator’. IEEE Int. Symp. on Signals, Circuits and Systems, Sapporo, Japan, 2019, pp. 14.
    9. 9)
      • 5. Cartagena, J., Gomez, H., Roa, E.: ‘A fully-synthesized TRNG with lightweight cellular-automata based post-processing stage in 130 nm CMOS’. 2016 IEEE Nordic Circuits and Systems Conf. (NORCAS), Copenhagen, Denmark, 2016, pp. 15.
    10. 10)
      • 3. Mathew, S.K., Srinivasan, S., Anders, M.A., et al: ‘2.4 gbps, 7 mW all-digital PVT-variation tolerant true random number generator for 45 nm CMOS high-performance microprocessors’, IEEE J. Solid-State Circuits, 2012, 47, (11), pp. 28072821.
    11. 11)
      • 2. Yang, K., Fick, D., Henry, M.B., et al: ‘16.3 a 23 Mb/s 23 pJ/b fully synthesized true-random-number generator in 28 and 65 nm CMOS’. 2014 IEEE Int. Solid-State Circuits Conf. Digest of Technical Papers (ISSCC), San Francisco, California, 2014, pp. 280281.
    12. 12)
      • 9. Duran, C., Wachs, M., Rueda, L.E.G., et al: ‘An energy-efficient RISC-V RV32IMAC microcontroller for periodical-driven sensing applications’. IEEE Custom Integrated Circuits Conf., 2020.
    13. 13)
      • 7. Tang, Q., Kim, B., Lao, Y., et al: ‘True random number generator circuits based on single- and multi-phase beat frequency detection’. Proc. of the IEEE 2014 Custom Integrated Circuits Conf., San Jose, California, 2014, pp. 14.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2019.0535
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