Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

access icon free Digitally programmable modified current differencing transconductance amplifier in 40-nm technology: design flow, parameter analyses and applications

The study discusses selected issues of modelling and designing current-mode devices. The authors propose the design flow that covers abstract behavioural models, the schematic and SPICE-level netlists and the post-layout parasitic parameters. The considerations related to the analogue functional blocks with a dual-stage complexity. The theoretical backgrounds of the current-mode basic building blocks are introduced. Special attention has been paid to a new current-mode active component, digitally programmable modified current differencing transconductance amplifier (MCDTA). Based on the idea of an MCDTA, the authors have developed their own cell, which integrates the digital control feature (programmability) into current-mode analogue devices. This original solution enables the dual control techniques, coarse digital control and precise analogue control to be used. The presented examples of continuous-time active filters show that such a solution enables flexibility in the digital control of the parameters of analogue blocks. In order to facilitate the integration of the analogue and mixed-signal models in a single environment, VHSIC Hardware Description Language - Analogue Mixed Signal (VHDL-AMS) language was selected for the behavioural modelling methodology. The authors have used the back annotating mechanism to update behavioural models based on an estimation of the post-layout parameters. The approach is presented on examples that were implemented in TMSC 40 nm complementary metal–oxide–semiconductor technology.

References

    1. 1)
      • 1. Acar, C., Ozoguz, S.: ‘A new versatile building block: current differencing buffered amplifier suitable for analog signal-processing filters’, Microelectron. J., 1999, 30, (2), pp. 157160.
    2. 2)
      • 13. Uhrmann, H., Kolm, R., Zimmermann, H.: ‘Analog filters in nanometer CMOS’, Springer Series in Advanced Microelectronics, vol. 45, (Springer-Verlag, Berlin Heidelberg, 2014).
    3. 3)
      • 10. Siripruchyanun, M., Jaikla, W.: ‘Current controlled current differencing transconductance amplifer and applications in continuous-time signal processing circuits’, Analog Integr. Circuits Signal Process., 2009, 61, pp. 247257.
    4. 4)
      • 25. Verilog-AMS Accellera Standard ver. 2.4, 2014. Available at https://www.accellera.org/images/downloads/standards/v-ams/VAMS-LRM-2-4.pdf, accessed 7 July 2019.
    5. 5)
      • 19. Rai, S.K., Gupta, M.: ‘Current differencing trans-conductance amplifier (CDTA) with enhanced performance and its application’, Springer Analog Integr. Circuits Signal Process., 2016, 86, (2), pp. 307319.
    6. 6)
      • 21. Malcher, A.: ‘Modified current differencing trans-conductance amplifier - new versatile active element’, Bull.Pol. Acad.Sci. Tech. Sci., 2012, 60, (4), pp. 739750.
    7. 7)
      • 20. Malcher, A., Falkowski, P.: ‘A modified current differencing transconductance amplifier and its applications’. 11th IFAC/IEEE Int. Conf. Programmable Devices and Embedded Systems, PDeS'2012, Brno, Czech Republic, 2012, pp. 206211.
    8. 8)
      • 24. ANSI/IEEE 1076.1-2007: ‘IEEE Standard VHDL Analog and Mixed-Signal Extensions’.
    9. 9)
      • 9. Siripruchyanun, M., Jaikla, W.: ‘CMOS current-controlled current differencing transconductance amplifier and applications to analog signal processing’, Int. J. Electron. Telecommun., 2008, 62, pp. 277287.
    10. 10)
      • 22. Malcher, A., Kristof, A, Pułka, A.: ‘40 nm CMOS implementation of basic building blocks for programmable current mode devices’. 2018 IEEE Int. Conf. on Signals and Electronic Systems (ICSES), Kraków, Poland, 2018, pp. 2732.
    11. 11)
      • 6. Satansup, J., Tangsrirat, W.: ‘Voltage differencing gain amplifier (VDGA) and its application’. Int. Symp. Communications and Information Technologies (ISCIT), Surat Thani, Thailand, 2013, pp. 303306.
    12. 12)
      • 26. Kerwin, W., Huelsman, L., Newcomb, R.: ‘State variable synthesis for insensitive integrated circuit transfer functions’, IEEE J. Solid-State, 1967, SC-2, pp. 8792.
    13. 13)
      • 16. Tangsrirat, W.: ‘Single-input three-output electronically tunable universal current-mode filter using current follower transconductance amplifiers’, AEU – Int. J. Electron. Commun., 2011, 65, (10), pp. 783787.
    14. 14)
      • 12. Xu, J., Wang, C., Jin, J.: ‘Low-voltage high-linearity wideband current differencing transconductance amplifier and its application on current-mode active filter’, Radioengineering, 2014, 23, (1), pp. 512522.
    15. 15)
      • 17. Kumngern, M., Torteanchai, U., Sarsitthithum, K.: ‘Current-tunable current-mode multifunction filter emplo-ying a modified CCCCTA’. Seventh IEEE Conference on Industrial Electronics and Applications (ICIEA), Singapore, Singapore, 2012, pp. 17941797.
    16. 16)
      • 15. Satansup, J., Pukkalanun, T., Tangsrirat, W.: ‘Current-mode KHN biquad filter using modified CFTAs and grounded capacitors’. Int. MultiConference of Engineers and Computer Scientists IMECS, Hong Kong, 2011, vol. II, pp. 923926.
    17. 17)
      • 11. Sedra, A., Smith, K.: ‘A second-generation current conveyor and its applications’, IEEE Trans. Circuit Theory, 1970, 17, pp. 132134.
    18. 18)
      • 23. Suda, N., Suh, J., Hakim, N., et al: ‘A 65 nm program-mable ANalog device array (PANDA) for analog circuit emulation’, IEEE Trans. Circuits Syst. I, Regul.Pap., 2016, 63, (2), pp. 181190.
    19. 19)
      • 18. Zazerin, A., Orlov, A., Bogdan, O.: ‘Modified operational transconductance amplifier macromodel application in piezoelectric active filter design’. IEEE 34th Int. Scientific Conference on Electronics and Nanotechnology (ELNANO), Kyiv, 2014, pp. 373377.
    20. 20)
      • 2. Badel, S., Baltaci, C., Cavrero, A., et al: ‘Design automation for differential MOS current-mode logic circuits’ (Springer Nature, Cham, Switzerland, 2019, 1st edn.).
    21. 21)
      • 14. Nagulapalli, R., Hayatleh, K., Barker, S., et al: ‘A novel current reference in 45 nm cmos technology’. Int. Conf. Electrical, Computer and Communication Technologies (ICECCT), Coimbatore, 2017, pp. 14.
    22. 22)
      • 7. Ibrahim, M.A., Kuntman, H.: ‘A CMOS realization of inverting second generation current conveyor ‘positive’ (ICCII+)’. NORSIG-2002 Fifth Nordic Signal Processing Symposium, Hurtigruten, Norway, 2002.
    23. 23)
      • 8. Soliman, E.A., Mahmoud, S.A.: ‘Voltage-mode field programmable analog array using second generation current conveyor’. IEEE 55th Int. Midwest Symp. on Circuits and Systems (MWSCAS), Boise, ID, USA2012, pp. 710713.
    24. 24)
      • 3. Biolek, D., Senani, R., Biolkova, V., et al: ‘Active elements for analog signal processing: classification, review, and new proposals’, Radioengineering, 2008, 17, (4), pp. 1532.
    25. 25)
      • 4. Brandstetter, P., Klein, L.: ‘Applications of non-inverting positive second generation current conveyor as a commercially available versatile active element’. IEEE International Conference on Signals and Electronic Systems (ICSES), Gliwice, Poland, 2010, pp. 157160.
    26. 26)
      • 5. Razavi, B.: ‘Design of analog CMOS integrated circuits’ (McGraw Hill Education, University of California, Los Angeles, 2017, 2nd edn.).
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2019.0494
Loading

Related content

content/journals/10.1049/iet-cds.2019.0494
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address