References

• 1. 1)
     • 10. Karmakar, S., Gogna, M., Suarez, E., et al: ‘3-State behavior of quantum dot gate FETs with lattice matched insulator’. Proc. of 2009 Nanoelectronic Devices for Defense and Security, Fort Lauderdale, FL, USA, September 2009.
  2. 2)
     • 20. Karmakar, S., Jain, F.C.: ‘Design of three bit ADC and DAC using spatial wave-function switched (SWS) FETs’, Silicon, 2016, 8, (3), pp. 369–379.
  3. 3)
     • 1. Ackermann, R.: ‘An Introduction to many-valued logics’ (Routledge and Kegan Paul, London, 1967).
  4. 4)
     • 27. Jazaeri, F., Sallese, J.M.: ‘Charge based EPFL HEMT model’, IEEE Trans. Electron. Devices, 2019, 66, (3), pp. 1218–1229.
  5. 5)
     • 7. Lin, S., Kim, Y., Lombardi, F.: ‘CNTFET-based design of ternary logic gates and arithmetic circuits’, IEEE Trans. Nanotechnol., 2011, 10, (2), pp. 217–225.
  6. 6)
     • 21. Karmakar, S., Chandy, J.A., Jain, F.C.: ‘Unipolar logic gates based on spatial wave-function switched FETs’, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2015, 23, (4), pp. 609–618.
  7. 7)
     • 28. Prodromakis, T., Toumazou, C., Chua, L.: ‘Two centuries of memristors’, Nat. Mater., 2012, 11, pp. 478–481.
  8. 8)
     • 16. Karmakar, S., Chandy, J.A., Jain, F.C.: ‘Eight-bit ADC using non-volatile flash memory’, IET Circuits Devices Syst., 2019, 13, (1), pp. 98–102..
  9. 9)
     • 26. Wang, J., Al-Khalidi, A., Zhang, C., et al: ‘Resonant tunneling diode as high speed optical/electronic transmitter’. 2017 10th UK-Europe-China Workshop on Millimetre Waves and Terahertz Technologies (UCMMT), Liverpool, UK, 11–13 September 2017.
  10. 10)
      • 17. Karmakar, S., Gogna, M., Jain, F.C.: ‘Fabrication of quantum dot gate non-volatile memory (QDNVM) based comparator’, Micro Nano Lett., 2019, 14, pp. 947–951.
  11. 11)
      • 14. Karmakar, S., Jain, F.C.: ‘Ternary SRAM using quantum dot gate field effect transistor (QDGFET)’, Micro Nano Lett., 2015, 10, pp. 621–624.
  12. 12)
      • 24. Lin, H.C.: ‘Resonant tunneling diodes for multi-valued digital applications’. Proc. 24th IEEE Int. Symp. Multiple – Valued Logic, Boston, Massachusetts, USA, 1994, pp. 188–195.
  13. 13)
      • 4. Huang, R., Wu, H.M., Kang, J.F., et al: ‘Challenges of 22 nm and beyond CMOS technology’, Sci. China Ser. F Inf. Sci., 2009, 52, (9), pp. 1491–1533.
  14. 14)
      • 6. Raychowdhury, A., Roy, K.: ‘A novel multiple-valued logic design using ballistic carbon nanotube FETs’. Proc. of Int. Symp. on Multiple-Valued Logic, Toronto, ON, Canada, 2004, pp. 14–19.
  15. 15)
      • 2. Critchlow, D.L.: ‘MOSFET scaling – the driver of VLSI technology’, Proc. IEEE, 1999, 87, pp. 659–667.
  16. 16)
      • 12. Karmakar, S., Gogna, M., Suarez, E., et al: ‘Three state quantum dot gate FET in silicon-on-insulator’, IET Circuits Devices Syst., 2015, 9, (1), pp. 1–8.
  17. 17)
      • 25. Forster, A.: ‘Resonant tunnelling diodes: the effect of structural properties on their performance’, in Helbig, Reinhard (Ed.): ‘Advances in Solid State Physics’, vol. 33, (Springer, Berlin, Heidelberg, 1993), pp. 37–62.
  18. 18)
      • 22. Karmakar, S., Chandy, J.A., Jain, F.C.: ‘Design of four state inverter based on spatial-wavefunction switched FETs’, Int. J. Electron. Lett., 2015, 3, pp. 225–236.
  19. 19)
      • 8. Taghavi, A., Carta, C., Meister, T., et al: ‘A CNTFET oscillator at 461 MHz’, IEEE Microw. Wirel. Compon. Lett., 2017, 27, (6), pp. 578–580.
  20. 20)
      • 13. Karmakar, S., Jain, F.C.: ‘Circuit model of different quantum dot based field effect transistors’, Silicon, 2015, 7, (1), pp. 15–26.
  21. 21)
      • 23. Capasso, F., Kiehl, R.A.: ‘Resonant tunneling transistor with quantum well base and high –energy injection: a new negative differential resistance device’, J. Appl. Phys., 1985, 58, (3), pp. 1366–1368.
  22. 22)
      • 11. Karmakar, S.: ‘Application of quantum dot gate FETs (QDGFETs) in ternary logic image inversion’, Analog Integr. Circuits Signal Process., 2016, 86, (240), pp. 1–8.
  23. 23)
      • 9. Lin, S., Kim, Y.-B., Lombardi, F.: ‘Design of a CNTFET-based SRAM cell by dual-chirality selection’, IEEE Trans. Nanotechnol.,2010, 9, (1), pp. 30–37.
  24. 24)
      • 19. Karmakar, S., Gogna, M., Jain, F.C.: ‘Application of quantum dot gate non-volatile memory (QDNVM) in image segmentation’, Signal. Image. Video. Process., 2016, 10, (3), pp. 551–558.
  25. 25)
      • 15. Goodnick, S.M., Bird, J.: ‘Quantum effects and single electron devices’, IEEE Trans. Nanotechnol., 2003, 2, (4), pp. 368–385.
  26. 26)
      • 3. Imtiaz, S.M.S., El-Ghazaly, S.M.: ‘Performance of MODFET and MESFET: a comparative study including equivalent circuits using combined electromagnetic and solid-state simulator’, IEEE Trans. Microw. Theory Tech., 1998, 46, (7), pp. 923–931.
  27. 27)
      • 29. Zidan, M.A., Strachan, J.P., Lu, W.D.: ‘The future of electronics based on memristive systems’, Nat. Electron., 2018, 1, pp. 22–29.
  28. 28)
      • 18. Karmakar, S., Chandy, J.A., Jain, F.C.: ‘Implementation of six bit ADC and DAC using quantum dot gate non-volatile memory’, J. Signal. Process. Syst., 2014, 75, pp. 209–216.
  29. 29)
      • 5. Mistry, K., Allen, C., Auth, C., et al: ‘A 45 nm logic technology with high-k + metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging’. IEDM Technical Digest, Washington, DC, USA, 2007, pp. 247–250.