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access icon free Integer-N charge pump phase locked loop for 2.4 GHz application with a novel design of phase frequency detector

© The Institution of Engineering and Technology
Received 05/05/2019, Accepted 02/10/2019, Revised 17/08/2019, Published 07/10/2019

In this article, a novel design is presented, for an Integer-N charge pump phase locked loop (PLL). The design is with a resetless phase frequency detector, and with the differential design of charge pump. The voltage-controlled oscillator is of current starved type. The proposed PLL is not having any blind zone and is having near-zero dead zone. When compared to the conventional design, the current mismatch in the charge pump is reduced by 3.21%, and the lock time of the PLL is reduced by 79%. The PLL is intended for 2.4 GHz application, and the obtained lock time is 1.7 μs. The implementation is done with the three-stage ring oscillator, with divider of modulus as 24, in 180 nm TSMC technology. At 1.8 V supply voltage, the circuit consumes 9.72 mW of power.

Inspec keywords: UHF integrated circuits; phase locked loops; voltage-controlled oscillators; phase detectors; charge pump circuits

Other keywords: frequency 2.4 GHz; differential design; near-zero dead zone; blind zone; phase locked loop; three-stage ring oscillator; PLL; voltage 1.8 V; size 180.0 nm; Integer-N charge pump; power 9.72 mW; TSMC technology; time 1.7 mus; voltage-controlled oscillator; phase frequency detector

Subjects: Oscillators; Modulators, demodulators, discriminators and mixers; Microwave integrated circuits; Power electronics, supply and supervisory circuits

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