access icon free 65 nm sub-threshold logic standard cell library using quasi-Schmitt-trigger design scheme and inverse narrow width effect aware sizing

In this study, the authors propose a sub-threshold standard cell library in which the quintessence is a quasi-Schmitt-trigger logic design scheme and the inverse narrow width effect aware sizing method. The techniques can improve the I on-to-I off ratio of the logic cells effectively and provide a significant suppression in leakage current, enhancing the robustness of the circuits. Simulation results show that the NAND3 and NOR3 logics with the new techniques achieve 40–60% and 30–50% reductions in leakage power compared with conventional logic circuits, respectively, when the voltage is scaled down to sub-threshold region. Again, they also exhibit considerable improvements in process variation immunity and power-delay product.

Inspec keywords: threshold logic; trigger circuits; logic circuits; logic gates; leakage currents; low-power electronics; logic design

Other keywords: sub-threshold region; leakage current; power-delay product; leakage power reduction; NAND3 logics; sub-threshold logic standard cell library; quintessence; logic cells; sub-threshold standard cell library; inverse narrow width effect aware sizing method; quasiSchmitt-trigger logic design scheme; NOR3 logics; process variation immunity; conventional logic circuits; size 65.0 nm; Ion-to-Ioff ratio

Subjects: Logic and switching circuits; Logic circuits; Digital circuit design, modelling and testing; Logic design methods; Logic elements

http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2019.0028
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content/journals/10.1049/iet-cds.2019.0028
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