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access icon free Multi-bit error control coding with limited correction for high-performance and energy-efficient network on chip

© The Institution of Engineering and Technology
Received 02/01/2019, Accepted 29/07/2019, Revised 05/07/2019, Published 12/08/2019

In the presence of deep submicron noise, providing reliable and energy-efficient network on-chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)-based coding scheme that simultaneously reduces the crosstalk induced bus delay and provides multi-bit error protection while achieving high-energy savings. This is achieved by calculating two-dimensional parities and duplicating all the bits, which provide single error correction and six errors detection. The error correction reduces the performance degradation caused by retransmissions, which when combined with voltage swing reduction, due to its high error detection, high-energy savings are achieved. The results show that the proposed scheme reduces the energy consumption up to 51.7% as compared with other schemes while achieving the target link reliability level. Also, it shows improved network performance as compared with ARQ-based scheme and close to forward error correction-based schemes.

Inspec keywords: crosstalk; error correction codes; automatic repeat request; telecommunication network reliability; forward error correction; error correction; delays; Hamming codes

Other keywords: target link reliability level; duplicating; multibit error protection; multibit error control coding; hybrid automatic repeat request-based; high error detection; deep submicron noise; ARQ-based scheme; errors detection; performance degradation; single error correction; challenging objective; energy consumption; network performance; high-energy savings; forward error correction-based schemes; two-dimensional parities; energy-efficient network

Subjects: Codes; Radio links and equipment; Protocols; Reliability; Other topics in statistics

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