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Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET

Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET

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In this work, the authors investigate analogue and radio-frequency (RF) figures-of-merit (FOM) of electrostatically-doped ferroelectric Schottky-barrier tunnel field-effect transistor (FET) (ED-FE-SBTFET) by deploying PZT (lead zirconium titanate) gate stack and dopant-free technology. This PZT gate stack results in negative capacitance behaviour as a result of the positive feedback among the electric dipoles within it. It realises an intrinsic amplifier to amplify the surface potential due to the applied gate bias and enhances the gate controllability significantly. As a result it facilitates lower ambipolar current, considerably high drive current and faster switching transitions. As the structure is realised by using dopant-free technique it ensures simplified fabrication process as it avoids the need of ion implantation and thermal annealing, reduces thermal budget. Here, a detailed comparison is carried-out between charge plasma Schottky-barrier tunnel FET and ED-FE-TFET for their high frequency FOMs such as cut-off frequency (), gain bandwidth product, transconductance generation factor and so on. The higher ratio of ED-FE-SBTFET reduces the static and dynamic both types of powers in digital circuits, while higher ratio ensures lower bias power of an amplifier.

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