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access icon free Low leakage domino logic circuit for wide fan-in gates using CNTFET

© The Institution of Engineering and Technology
Received 27/04/2018, Accepted 29/08/2018, Revised 11/08/2018, Published 30/08/2018

A carbon nanotube field effect transistor (CNTFET) emerged as an alternative to the complementary metal oxide semiconductor (CMOS) for implementing low-power high-speed very-large-scale integration circuits. In this study, the CNTFET technology is discussed that has faster switching speed and high-carrier mobility as compared with the CMOS technology. A new technique ultra-low power dynamic node driven transistor domino logic is proposed for designing low-power domino logic circuits. 2, 4, 8 and 16 input logic gates are simulated using the proposed and existing techniques. Simulation is done on an H-Spice Stanford CNFET 32 nm model at a clock frequency of 200 MHz using the CNTFET technology. The proposed technique shows a maximum power reduction of 57.14% and a maximum delay reduction of 50.24% as compared with the current mirror footed domino logic technique in CNTFET technology. The proposed technique has a maximum power reduction of 96.61% in the CNTFET technology as compared with its counterpart in the CMOS technology for the two-input OR gate. The proposed technique shows a maximum improvement of 1.39× in unity noise gain as compared with the conditional stacked keeper domino logic technique for 16 input OR gates in the CNTFET technology at 200 MHz.

Inspec keywords: low-power electronics; logic design; CMOS logic circuits; carbon nanotube field effect transistors; leakage currents; logic gates

Other keywords: low-power high-speed very-large-scale integration circuits; CNTFET technology; low leakage domino logic circuit; ultra-low power dynamic node driven transistor; two-input OR gate; frequency 200.0 MHz; high-carrier mobility; current mirror footed domino logic; size 32.0 nm; logic gates; carbon nanotube field effect transistor; C; maximum power reduction; low-power domino logic circuits; complementary metal oxide semiconductor; wide fan-in gates; H-Spice Stanford CNFET

Subjects: Digital circuit design, modelling and testing; Electrical/electronic equipment (energy utilisation); CMOS integrated circuits; Logic circuits; Logic design methods; Fullerene, nanotube and related devices; Logic and switching circuits

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