%0 Electronic Article
%A Fei Yuan
%K time balun
%K time quantiser
%K first-order ΔΣ time-to-digital converter
%K time amplifier
%K time registers
%K all-digital arithmetic unit
%K time-mode signal processing
%K switched delay unit
%K time polarity detector
%K time adder
%K unidirectional gated delay line
%K absolute-value generator
%K dual discharge path
%K time integrator
%X This study provides a comprehensive treatment of the design techniques of all-digital arithmetic units for time-mode signal processing. The arithmetic units investigated include time polarity detectors, time absolute-value generators, time adders, time baluns, time amplifiers, time quantisers, time registers, and time integrators. The principle, circuit implementation, constraints and limitations of these units are investigated in detail. An emphasis is given to time adders and time integrators. An in-depth study of time adders constructed from switched delay units, dual discharge paths, and unidirectional gated delay lines is provided. It is followed with the presentation of three time registered evolved from these time adders. Three time integrators developed from the preceding time adders and time registers are studied and their characteristics are compared. Finally, the design of a first-order Δ Σ time-to-digital converter utilising these arithmetic units is presented.
%@ 1751-858X
%T Design techniques of all-digital arithmetic units for time-mode signal processing
%B IET Circuits, Devices & Systems
%D November 2018
%V 12
%N 6
%P 753-763
%I Institution of Engineering and Technology
%U https://digital-library.theiet.org/;jsessionid=30cujck3cr8al.x-iet-live-01content/journals/10.1049/iet-cds.2017.0327
%G EN