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access icon free Widening and narrowing of time interval due to single-event transients in 45 nm vernier-type TDC

Single-event transients (SETs) due to heavy-ion (HI) strikes adversely affect the electronic circuits in sub-100 nm regime in radiation environment. Time-to-digital converter (TDC) is an important electronic component in many fields such as space applications and is used for measuring time precisely as a digital value. In this study, the effect of SET due to radiation strike on 45 nm vernier-type TDC with a resolution of 7 ps is analysed using cadence spectre circuit simulator. When HI strikes the delay line of TDC close to the START/STOP pulse transition, it either widens or narrows the time interval to be measured, depending on whether it strikes the top/bottom voltage-controlled delay line (VCDL). Results show that the TDC is sensitive if the SET occurs during the transition of START/STOP pulse. Moreover, the change in the time interval occurs in a regular staircase pattern, if the VCDL is struck at all instants near the pulse transition. These errors lead to erroneous digital output and cause abrupt deviations in the staircase transfer characteristics of TDC. SETs in other constituent components of TDC such as D-flip-flop and priority encoder produces glitches which can be mitigated using existing guard gate technique.

References

    1. 1)
      • 9. Rogacki, S., Zurbuchen, T.H.: ‘A time digitizer for space instrumentation using a field programmable gate array’, Rev. Sci. Instrum. (AIP), 2013, 84, (8), pp. 0831071–083107–10.
    2. 2)
      • 15. Makihara, A., Ebihara, T., Yokose, T., et al: ‘New SET characterization technique using SPICE for fully depleted CMOS/SOI digital circuitry’, IEEE Trans. Nucl. Sci., 2008, 55, (6), pp. 29212927.
    3. 3)
      • 19. Jeong, D.K., Borriello, G., Hodges, D.A., et al: ‘Design of PLL-based clock generation circuits’, IEEE J. Solid-State Circuits, 1987, 22, (2), pp. 255261.
    4. 4)
      • 7. Karadamoglou, K., Paschalidis, N.P., Sarris, E., et al: ‘An 11 bit high-resolution and adjustable-range CMOS time-to-digital converter for space science instruments’, IEEE J. Solid-State Circults, 2004, 39, (1), pp. 214222.
    5. 5)
      • 14. Messenger, G.C.: ‘Collection of charge on junction nodes from ion tracks’, IEEE Trans. Nucl. Sci., 1982, 29, (6), pp. 20242031.
    6. 6)
      • 20. TCAD Sentaurus device user guide, ver. J-2014.09, Synopsys, 2014.
    7. 7)
      • 4. Ferlet-Cavrois, V., Massengill, L.W., Gouker, P.: ‘Single event transients in digital CMOS – a review’, IEEE Trans. Nucl. Sci., 2013, 60, (3), pp. 17671790.
    8. 8)
      • 13. Cadence SPECTRE circuit simulator, version 11.1.0 ed., Cadence, 2012.
    9. 9)
      • 16. Pasupathy, K.R., Bindu, B.: ‘A review on circuit simulation techniques of single-event transients and their propagation in delay locked loop’, IETE Tech. Rev., 2017, 34, (3), pp. 276285.
    10. 10)
      • 17. Gadlage, M.J., Ahlbin, J.R., Narasimham, B., et al: ‘Scaling trends in SET pulse widths in sub-100 nm bulk CMOS processes’, IEEE Trans. Nucl. Sci., 2010, 57, (6), pp. 33363341.
    11. 11)
      • 21. Balasubramanian, A., Bhuva, B.L., Black, J.D., et al: ‘RHBD techniques for mitigating effects of single-event hits using guard-gates’, IEEE Trans. Nucl. Sci., 2005, 52, (6), pp. 25312535.
    12. 12)
      • 2. Artola, L., Gaillardin, M., Huber, G., et al: ‘Modeling single event transients in advanced devices and ICs’, IEEE Trans. Nucl. Sci., 2015, 62, (4), pp. 15281539.
    13. 13)
      • 10. Ye, C., Zhao, L., Zhou, Z., et al: ‘A field-programmable-gate-array based time digitizer for the time-of-flight mass spectrometry’, Rev. Sci. Instrum. (AIP), 2014, 85, (4), pp. 0451151–045115–7.
    14. 14)
      • 11. Rahkonen, T.E., Kostamovaara, J.: ‘The use of stabilized CMOS delay lines for the digitization of short time intervals’, IEEE J. Solid-State Circuits, 1993, 28, (8), pp. 887894.
    15. 15)
      • 8. Turko, B.: ‘A picosecond resolution time digitizer for laser ranging’, IEEE Trans. Nucl. Sci., 1978, 25, (1), pp. 7580.
    16. 16)
      • 6. Dodd, P.E.: ‘Physics-based simulation of single-event effects’, IEEE Trans. Device Mater. Reliab., 2005, 5, (3), pp. 343357.
    17. 17)
      • 22. Huang, P., Chen, S., Chen, J., et al: ‘Single-event pulse broadening after narrowing effect in nano-CMOS logic circuits’, IEEE Trans. Device Mater. Reliab., 2014, 14, (3), pp. 849856.
    18. 18)
      • 3. Chen, Y.P., Loveless, T.D., Maillard, P., et al: ‘Single-event transient induced harmonic errors in digitally controlled ring oscillators’, IEEE Trans. Nucl. Sci., 2014, 61, (6), pp. 31633170.
    19. 19)
      • 1. Wang, H.B., Mahatme, N., Chen, L., et al: ‘Single-event transient sensitivity evaluation of clock networks at 28 nm CMOS technology’, IEEE Trans. Nucl. Sci., 2016, 63, (1), pp. 385391.
    20. 20)
      • 12. Dudek, P., Szczepanski, S., Hatfield, J.V.: ‘A high-resolution CMOS time-to-digital converter utilizing a vernier delay line’, IEEE J. Solid-State Circuits, 2000, 35, (2), pp. 240247.
    21. 21)
      • 5. Rathod, S.S., Saxena, A.K., Dasgupta, S.: ‘Analysis of double-gate FinFET-based address decoder for radiation-induced single-event-transients’, IET Circuits Devices Syst., 2012, 6, (4), pp. 218226.
    22. 22)
      • 18. Dodd, P.E., Shaneyfelt, M.R., Felix, J.A., et al: ‘Production and propagation of single-event transients in high-speed digital logical ICs’, IEEE Trans. Nucl. Sci., 2004, 51, (6), pp. 32783284.
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