access icon free High-performance VLSI architectures for M-PSK modems

M-PSK (phase shift keying) modulation schemes are used in many high-speed applications like satellite communication, as they are more bandwidth and power efficient compared with other schemes. This study presents very large scale integrated circuits (VLSI) architectures for modulators and demodulators of quadrature phase shift keying (QPSK), 8PSK and 16PSK systems, based on the principle of direct digital synthesis. The proposed modulators do not use any multiplier in contrast to the conventional modulators and hence they are relatively fast and area efficient. Based on the coherent detection technique, this study proposes new demodulation algorithms for 8PSK and 16PSK systems which can be implemented both in analogue and digital domains. This study also presents VLSI architectures for all the proposed algorithms. The proposed architectures are described in Verilog and implemented on Xilinx field programmable gate arrays (FPGAs). The simulation results verify their functional validity and implementation results show the suitability of the proposed architectures for satellite communications.

Inspec keywords: modulators; demodulators; quadrature phase shift keying; VLSI

Other keywords: direct digital synthesis; QPSK modulators; 16PSK systems; 8PSK system; digital domains; Xilinx FPGAs; QPSK demodulators; Verilog; M-PSK modulation schemes; coherent detection technique; M-PSK modems; analogue domains; satellite communication; high-performance VLSI architectures

Subjects: Modulators, demodulators, discriminators and mixers; Semiconductor integrated circuits

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http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2016.0243
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