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access icon free A new approach for designing compressors with a new hardware-friendly mathematical method for multi-input XOR gates

© The Institution of Engineering and Technology
Received 29/01/2016, Accepted 04/05/2016, Revised 19/04/2016, Published 01/01/2017

This study presents a new scalable mathematical approach for designing compressors with any arbitrary number of inputs using multi-input threshold gates, behaving as exclusive-OR (XOR). This study relates the theoretical concept to hardware implementation. The methodology is exploited for 3:2, 7:3, and 15:4 compressors, and then implemented by using input capacitors (or resistors) and threshold detectors. The transistor-level realisation of 3:2 and 7:3 compressors is simulated by using Synopsys HSPICE and 32 nm Carbon Nanotube Field Effect Transistors technology. The proposed methodology benefits from the parallel operation of threshold detectors. Therefore, by increasing the number of inputs, the delay parameter does not increase dramatically. The layout views are also provided in order to be able to compare area for the 3:2 compressors with both capacitor and resistor networks.

Inspec keywords: SPICE; carbon nanotube field effect transistors; logic gates; logic circuits

Other keywords: input capacitors; delay parameter; Synopsys HSPICE; threshold detectors; multiinput XOR gates; exclusive-OR gates; carbon nanotube field effect transistor technology; hardware-friendly mathematical method; resistor networks; size 32 nm; layout views; compressor design; multiinput threshold gates

Subjects: Logic circuits; Logic elements; Logic and switching circuits

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