High speed, open loop residue amplifier with linearity improvement

Mahmoud Mahdipour Pirbazari; Khayrollah Hadidi; Abdollah Khoei; Shamim Sadrafshari

High speed, open loop residue amplifier with linearity improvement

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Author(s): Mahmoud Mahdipour Pirbazari ¹ ; Khayrollah Hadidi ¹ ; Abdollah Khoei ¹ ; Shamim Sadrafshari ¹
- Affiliations: 1: Microelectronics Research Laboratory, Urmia University, Urmia, Iran
Source: Volume 9, Issue 4, July 2015, p. 299 – 308
DOI: 10.1049/iet-cds.2014.0214 , Print ISSN 1751-858X, Online ISSN 1751-8598

Received 13/08/2014, Accepted 07/02/2015, Revised 31/01/2015, Published 25/06/2015

In this paper a new solution for a highly linear, high speed open loop (OL) residue amplifier for applications in high-speed pipelined analogue-digital converters is proposed. The proposed amplifier has a voltage gain of 4 (V/V) with <0.2% non-linearity error and 1.2 V_p-p output swing. The amplifier is compensated for process variations by using a novel gain control mechanism, thus maintains the linearity in all process conditions and also in the presence of a mismatch. The proposed amplifier is designed in 0.35 μm complementary metal-oxide semiconductor process, and the settling time is approximately 2 ns when driving two 1 pF single ended capacitive loads. It consumes 38 mW power from a 2.8 V supply and occupies 0.073 mm² of die area. Simulations are performed in HSPICE using level 49 models.

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High speed, open loop residue amplifier with linearity improvement

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