High throughput concurrent lookahead adaptive decision feedback equaliser

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High throughput concurrent lookahead adaptive decision feedback equaliser

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A time-domain adaptive decision feedback equaliser (ADFE) for multi-gigabit wire-line 2-pulse amplitude modulation (PAM) communication systems is proposed. The throughput rate of a conventional ADFE is limited by the loops in the circuit. This investigation develops two methods for breaking or virtually breaking these loops. The first is the method of batch mode coefficient updating (BMCU), and the second is the concurrent lookahead (CLA) method. Since the loops are broken or virtually broken, a pipeline and/or a parallel method can be applied to design a throughput-rate-unlimited ADFE. The results of a simulation of the 10GBASE-S system reveal that the proposed BMCU-based CLA ADFE has the same average signal-to-noise ratio (SNR) as the original sequential ADFE for multi-mode fibres of length 30–90 m.

Inspec keywords: decision feedback equalisers; adaptive equalisers; pulse amplitude modulation; carrier transmission on power lines

Other keywords: concurrent lookahead adaptive decision feedback equaliser; 10GBASE-S system; time domain adaptive decision feedback equaliser; multigigabit wire line two pulse amplitude modulation; batch mode coefficient updating; PAM

Subjects: Communication channel equalisation and identification; Modulation and coding methods; Power line systems

References

    1. 1)
      • Kasturia, S., Cioffi, J.M.: `Vector coding with decision feedback equalization for partial response channels', IEEE Proc. GLOBECOM, November 1988, p. 853–857.
    2. 2)
      • 10 Gb/s Ethernet over fibre, IEEE Std 802.3ae, 2002.
    3. 3)
      • Gatherer, A., Meng, T.H.-Y.: `High sampling rate adaptive decision feedback equalizers', IEEE Int. Conf. on Acoustics, Speech, and Signal Processing (ICASSP), 1990, 2, p. 909–912.
    4. 4)
      • Parhi, K.K.: `Pipeling of parallel multiplexer loops and decsion feedback equalizers', IEEE Int. Conf. on Acoustics, Speech, and Signal Processing (ICASSP), 2004, 5, p. 17–21.
    5. 5)
    6. 6)
    7. 7)
    8. 8)
      • Lin, Y.-C., Shiue, M.-T., Jou, S.-J.: `10Gbps decision feedback equalizer with dynamic lookahead decision loop', IEEE Int. Symp. on Circuits and Systems (ISCAS), May 2009, p. 1839–1842.
    9. 9)
      • S. Haykin . (1996) Adaptive filter theory.
    10. 10)
      • Oh, D., Parhi, K.K.: `Low complexity design of high speed parallel decision feedback equalizers', IEEE Conf. on Application-Specific Systems, Architectures and Processors (ASAP), 2006, p. 118–124.
    11. 11)
    12. 12)
    13. 13)
    14. 14)
      • Ln, C.-S., Lin, Y.-C., Jou, S.-J., Shiou, M.-T.: `Concurrent digital adaptive decision feedback equalizer for 10GBase-LX4 Ethernet system', IEEE Custom Integrated Circuit Conf. (CICC), September 2007, p. 289–292.
    15. 15)
      • K.K. Parhi . (1999) VLSI digital signal processing systems: design and implementation.
    16. 16)
    17. 17)
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