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Alpha-particle-induced effects in partially depleted silicon on insulator device: with and without body contact

Alpha-particle-induced effects in partially depleted silicon on insulator device: with and without body contact

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With the continuous downscaling of CMOS technologies, reliability has become one of the major bottlenecks in the evolution of next generation systems. The radiation-induced soft errors have become one of the most important and challenging failure mechanisms in the modern semi-conductor devices. The authors present an in-depth analysis of alpha-particle-induced effects in deep submicron partially depleted silicon on insulator (PD-SOI) device. Device with body contact as well as device without body contact is analysed. The process and device simulations are done with the latest models. Electrical parameter extraction under different energies of an alpha particle is carried out.

References

    1. 1)
    2. 2)
      • F.T. Brady , B. Keshavan , L. Rockett . Evaluation of the performance and reliability of a 1MB SRAM on fully-depleted SOI. Proc. IEEE Int. SOI Conf. , 129 - 130
    3. 3)
      • Synopsys TCAD User Manuals, available at: http://www.synopsys.com/products/tcad/tcad.html.
    4. 4)
    5. 5)
    6. 6)
    7. 7)
      • J.B. Kuo , S-C. Lin . (2001) Low voltage SOI CMOS VLSI devices and circuits.
    8. 8)
      • Y. Wada , K. Nii , H. Kuriyama , S. Maeda , K. Ueda , Y. Matsuda . A 128Kb SRAM with soft error immunity for 0.35 µm SOI-CMOS embedded cell arrays. Proc. IEEE Int. SOI Conf. , 127 - 128
    9. 9)
    10. 10)
    11. 11)
      • D. Ratter . FPGAs on Mars. Xcell J. , 8 - 11
    12. 12)
    13. 13)
    14. 14)
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