© The Institution of Engineering and Technology
A 1.8-GHz power amplifier is implemented using the 0.18-µm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. An additional thin-film technology on a separate substrate is used to design the output matching network for high efficiency. To minimise the number of bond-wires, a single differential power stage is used. The output matching network was completed with the proposed load impedance transformer and an Metal Insulator Metal (MIM) capacitor using additional thin-film technology. The amplifier achieved a drain efficiency of 50.5% at a maximum output power of 31.6 dBm at 1.81 GHz.
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