Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

access icon openaccess Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications

© The Institution of Engineering and Technology
Received 01/05/2016, Accepted 29/06/2016, Revised 27/06/2016, Published 22/09/2016

The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed.

Inspec keywords: mobile computing; medical signal processing; hardware description languages; wavelet transforms; field programmable gate arrays

Other keywords: code generator program; high-performance computing; Xilinx; C language; multichannel real-time application; embedded-system approach; mobile applications; hardware description language; PIC microcontroller; generator DSP design tool; personal computer; DTCWT algorithm; Verilog; field programmable gate array; dual tree complex wavelet transform

Subjects: Digital signal processing; Mobile, ubiquitous and pervasive computing; Biomedical measurement and imaging; Biology and medical computing; Patient diagnostic methods and instrumentation; Signal processing and detection; Integral transforms; Integral transforms

References

    1. 1)
      • 17. Serbes, G., Aydin, N.: ‘A complex discrete wavelet transform for processing quadrature Doppler ultrasound signals’. Ninth Int. Conf. on Information Technology and Applications in Biomedicine, 2009, pp. 1–4.
    2. 2)
      • 19. https://www.youtube.com/watch?v=NXJ7wLfOIcM.
    3. 3)
      • 12. Farahanı, M.A., Eshghı, M.: ‘Wavelet packet transform on FPGA’. Proc. of the Eighth WSEAS Int. Conf. on Acoustics & Music: Theory & Applications, Vancouver, Canada, 19–21 June 2007.
    4. 4)
      • 10. Nibouche, M., Bouridane, A., Nibouche, O., et al: ‘Design and FPGA implementation of orthonormal inverse discrete wavelet transforms.’ 2001 IEEE Third Workshop on Signal Processing Advances in, Taiwan, 2001, pp. 356–359.
    5. 5)
      • 5. Serbes, G., Aydin, N.: ‘Denoising embolic Doppler ultrasound signals using dual tree complex discrete wavelet transform’. 2010 Annual Int. Conf. of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010, pp. 1840–1843.
    6. 6)
      • 2. Yu, Y., Kwan, B., Lim, C., et al: ‘Video-based heart rate measurement using short-time Fourier transform’. 2013 Int. Symp. on Intelligent Signal Processing and Communications Systems (ISPACS), 12–15 November 2013, pp. 704–707.
    7. 7)
    8. 8)
    9. 9)
      • 9. Mei-hua, X., Zhang-jin, C., Feng, R., et al: ‘Architecture research and VLSI implementation for discrete wavelet packet transform.’ Conf. on High Density Microsystem Design and Packaging and Component Failure Analysis, Shanghai, 2006, pp. 1–4.
    10. 10)
    11. 11)
      • 14. Canbay, F., Levent, V.E., Serbes, G., et al: ‘Field programmable gate arrays implementation of dual tree complex wavelet transform’. 37th Annual Int. Conf. of the IEEE Engineering in Medicine and Biology Society (EMBC'2015), Milan, Italy, 2015.
    12. 12)
    13. 13)
      • 16. Canbay, F., Levent, V.E., Serbes, G., et al: ‘A multi-channel real time implementation of dual tree complex wavelet transform in field programmable gate arrays’. 15th IEEE Int. Conf. on Bioinformatics and Bioengineering (MEDICON'2016), Paphos, CYPRUS, 2016.
    14. 14)
      • 13. http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/sysgen_gs.pdf.
    15. 15)
      • 11. Al-Haj, A.M.: ‘Fast discrete wavelet transformation using FPGAs and distributed arithmetic’, Int. J. Appl. Sci. Eng., 2003, 1, (2), pp. 160–171.
    16. 16)
    17. 17)
    18. 18)
      • 15. Canbay, F., Levent, V.E., Serbes, G., et al: ‘An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays’. 15th IEEE Int. Conf. on Bioinformatics and Bioengineering (BIBE'2015), Belgrade, Serbia, 2015.
    19. 19)
      • 8. Dong, M.J., Yung, K.G., Kaiser, W.J.: ‘Low power signal processing architectures for network microsensors’. 1997 Int. Symp. on Low Power Electronics and Design, 1997 Proc., 1997, pp. 173–177.
http://iet.metastore.ingenta.com/content/journals/10.1049/htl.2016.0034
Loading

Related content

content/journals/10.1049/htl.2016.0034
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
Print this page
This is a required field
Please enter a valid email address