Various techniques have been used to push processes this far past the point where diffraction effects kick in. These have included using phase-shift masking to turn diffraction to the designers' advantage, and optical proximity correction (OPC) techniques, such as adding 'ears' to the corners of layout elements so that they are printed as right angles. The problem is that chipmakers are applying ever more Byzantine combinations of these techniques to keep up with shrinking process dimensions, and getting diminishing returns. Device characteristics are varying wildly as more aggressive OPC techniques are pressed into action. The chip equipment industry has been working to solve this for years, but couldn't persuade its customers that moving to 157nm illumination sources was worth the development costs given the marginal advantages it would bring over 193nm light. Unfortunately, the development of EUV lithography is fraught with difficulties. The solution to the 65 nm and 45 nm design for manufacture is new DFM routers. As they are DFM-aware they can run the rule-based checks and ensure that around 80 percent of the DFM problems are avoided. The layout team can then use model- based DFM to take care of the remaining 20 percent.