Suppressing ability of germanium preamorphisation thicknesses combined with sub-keV boron implantation for drive current improvement

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Suppressing ability of germanium preamorphisation thicknesses combined with sub-keV boron implantation for drive current improvement

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The nanoscale gate length of CMOS technology using germanium preamorphisation implantation (Ge PAI) is reported. By optimising the Ge PAI dose and amorphous thickness, the device characteristics can be enhanced and the fluctuations can be minimised. Optimum conditions of Ge PAI can also minimise the transient enhanced diffusion of boron by reducing the density of point defects generated by boron implants. Suppressing ability is related to the Ge amorphous layer thickness, which can be varied with the concentration ratio of 72 Ge to 74 Ge PAI doses. It is attributed to a gradated and thinner Ge amorphous layer to have a weak ability to suppress the channelling tail of boron than a uniform and thicker Ge amorphous layer at the same implanted dose.

Inspec keywords: point defects; ion implantation; amorphisation; CMOS integrated circuits; nanotechnology; germanium; boron

Other keywords: CMOS technology; amorphous layer thickness; Ge:B; drive current; point defects; nanoscale gate length; transient enhanced diffusion; boron implantation; germanium preamorphisation implantation

Subjects: Nanometre-scale semiconductor fabrication technology; Semiconductor doping; CMOS integrated circuits

References

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      • Childambaram, P.R., Smith, B.A., Hall, L.H., Bu, H., Chakravarthi, S.: `35% drive current improvement from recessed-SiGe drain extensions on 37 nm gate length PMOS', VLSI Technology Symp., June 2004, Honolulu, USA, p. 48–49.
    2. 2)
      • Q. Xu , X. Duan , H. Liu , Z. Han , T. Ye . Low-cost and highly manufacturable strained-Si channel technique for strong hole mobility enhancement on 35-nm gate length pMOSFETs. IEEE Trans. Electron Devices , 6 , 1394 - 1401
    3. 3)
      • Q. Xu , X. Duan , H. Qian , M. Liu , H. Liu , H. Li , S. Zhou . Hole mobility enhancement of pMOSFETs with strain channel induced by Ge pre-amorphization implantation for source/drain extension. IEEE Electron Device Lett. , 3 , 179 - 181
    4. 4)
      • Adachi, K., Ohuchi, K., Toyoshima, Y.: `Combination of germanium preamorphisation and sub-keV boron implantation for source/drain extension of pMOSFETs', IWJT 2nd Int. Workshop on Junction Technology, November 2001, Tokyo, Japan, p. 35–38.
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