Alloyed junction Ge Esaki diodes on Si substrates realised by aspect ratio trapping technique

Access Full Text

Alloyed junction Ge Esaki diodes on Si substrates realised by aspect ratio trapping technique

For access to this article, please select a purchase option:

Buy article PDF
£12.50
(plus tax if applicable)
Buy Knowledge Pack
10 articles for £75.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

A Ge Esaki diode is demonstrated on Si atop a coalesced epitaxial layer of Ge grown through narrow openings in SiO2 that are used to trap threading dislocations from the lattice mismatch. Spin-on doping was used to form the n-type junction and a controlled alloyed reaction of Al and Ge forms the p-type junction. At an alloy temperature of 580°C for 1 s, the Ge-on-Si diodes were found to have a peak-to-valley current ratio of 1.1 with a peak current density of 4.1 kA/cm2.

Inspec keywords: p-n junctions; dislocations; semiconductor growth; aluminium; Ge-Si alloys; semiconductor epitaxial layers; current density; semiconductor doping; tunnel diodes

Other keywords: GeSi-Al-SiO2; peak-to-valley current ratio; Esaki diodes; p-type junction; threading dislocations; temperature 580 C; current density; aspect ratio trapping technique; spin-on doping; Si; lattice mismatch; controlled alloyed reaction; germanium growth; coalesced epitaxial layer; n-type junction

Subjects: Semiconductor doping; Junction and barrier diodes

References

    1. 1)
      • R.E. Davis , G. Gibbons . Design principles and construction of planar Ge Esaki diodes. Solid-State Electron. , 461 - 466
    2. 2)
    3. 3)
      • C.O.C. Chui , K. Gopalakrishnan , P.B. Griffin , J.D. Plummer , K.C. Saraswat . Activation and diffusion studies of ion-implanted p and n dopants in germanium. Appl. Phys. Lett.
    4. 4)
    5. 5)
    6. 6)
    7. 7)
      • Sudirgo, S., Pawlik, D.J., Kurinec, S.K., Thompson, P.E., Daulton, J.W., Park, S.Y., Yu, R., Berger, P.R., Rommel, S.L.: `NMOS/SiGe resonant interband tunneling diode static random access memory', Proc. 64th Annual Device Research Conf., 2006, Pennsylvania, USA, p. 265–266.
    8. 8)
      • S. Sedlmaier , K.K. Bhuwalka , A. Ludsteck , M. Schmidt , J. Schulze , W. Hansch , I. Eisele . Gate-controlled resonant interband tunneling in silicon. Appl. Phys. Lett. , 1707 - 1709
    9. 9)
    10. 10)
    11. 11)
      • D. Meyerhofer , G.A. Brown , H.S. Sommers . Degenerate germanium. I. Tunnel, excess, and thermal current in tunnel diodes. Phys. Rev.
    12. 12)
      • A.G. Chynoweth , R.A. Logan , D.E. Thomas . Phonon-assisted tunneling in silicon and germanium Esaki junctions. Phys. Rev.
    13. 13)
    14. 14)
    15. 15)
http://iet.metastore.ingenta.com/content/journals/10.1049/el_20081284
Loading

Related content

content/journals/10.1049/el_20081284
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading