0.75 V micro-power SI memory cell with feedthrough error reduction

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0.75 V micro-power SI memory cell with feedthrough error reduction

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© The Institution of Engineering and Technology
Published

A simple technique to realise a switched current memory cell operating from low supply voltage (0.75 V) with clock-feedthough (CFT) error reduction is presented. Unlike previous techniques that try to minimise current error by compensation at the output, this technique prevents the occurrence of current error by removing the feedthrough voltage from the input port of the memory transistor directly. As a result, the CFT error current at the output is almost completely eliminated employing a simple and compact circuit structure. Simulation results are given, showing good agreement to the theory.

Inspec keywords: silicon; MOSFET; analogue storage; low-power electronics; compensation; elemental semiconductors; switched current circuits

Other keywords: voltage 0.75 V; compensation; clock-feedthough error reduction; Si; memory transistor; micropower switched current memory cell operation

Subjects: Analogue storage; Insulated gate field effect transistors; Analogue processing circuits; Power electronics, supply and supervisory circuits

References

    1. 1)
      • Hughes, J.B., Bird, N.C., Macbeth, I.C.: `Switched current: a new technique for analog sampled data signal processing', Proc. IEEE ISCAS, 1989, Portland, OR, USA, p. 1584–1587.
    2. 2)
      • Fiez, T.S., Allstot, D.J., Liang, G., Lao, P.: `Signal-dependent clock-feedthrough cancellation in switched current circuits', Proc. IEEE ISCAS, 1991, Singapore, p. 785–788.
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      • R.G. Cavajal , J. Ramirez-Angulo , A.J. Lopez-Martin , A. Torralba , J.A. Gomez Galen , A. Carlosena , F.M. Chavero . The flipped voltage follower: a useful cell for low-voltage low-power circuit design. IEEE Trans. Circuits Syst. I , 7 , 1276 - 1291
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