© The Institution of Engineering and Technology
A digitally-controlled topology that reduces power dissipation to half that of the conventional one while occupying smaller die area and obtaining higher linearity is presented. In the 0.13 µm CMOS process, the VGA occupies an active area of 0.46 mm2 and dissipates an average current of 5.2 mA at 1.5 V. The gain-variation range is −32 to 52 dB with a gain error of less than ±1 dB. The IIP3, P1dB, NF at 52 dB of gain, and 3 dB bandwidth are −37 to +13 dBm, −42 to −2 dBm, 6.2 dB and 200 MHz, respectively.
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http://iet.metastore.ingenta.com/content/journals/10.1049/el_20080135
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