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Hybrid nanocrystal FinFET with large P/E window for MLC NAND Flash memory application

Hybrid nanocrystal FinFET with large P/E window for MLC NAND Flash memory application

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The engineered trap layer with nanocrystal and high-k blocking oxide are applied to the FinFET structure. The increased trap density of the hybrid nanocrystal trap layer and the enhanced leakage reduction of AlxOy are proposed as a dominant role of the larger program and erase window of 8.3 V which is applicable to the MLC Flash memory device.

References

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      • Kim, K., Choi, J.H., Choi, J., Jeong, H.S.: `The future prospect of nonvolatile memory', IEEE Int. Symp. on VLSI-TSA, 2005, Tech. Dig., p. 88–94.
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      • H. Coffin , C. Bonafos , S. Schamm , M. Carrada , N. Cherkashin , G.B. Assayag , P. Dimitrakis , P. Normand , M. Respaud , A. Claverie . Si nanocrystals by ultra-low energy ion implantation for non-volatile memory applications. Mater. Sci. Eng. , 499 - 503
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