Analysis of the effects of thermal noise in nanoscale memories is presented. A theoretical analysis of thermal noise is used to predict the number of bit errors per year caused by thermal noise.
Inspec keywords: integrated circuit noise; thermal noise; nanoelectronics; integrated memory circuits; error statistics
Other keywords:
Subjects: Memory circuits; Semiconductor integrated circuits; Semiconductor storage
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http://iet.metastore.ingenta.com/content/journals/10.1049/el_20063803
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