References

• 1. 1)
     • Philips, K.: `A 2 mW 89 dB DR continuous-time ΣΔ ADC with increased immunity to wide-band interferers', ISSCC Dig. Tech. Pprs., February 2004, p. 86–87.
  2. 2)
     • A. Zolfaghari , B. Razavi . A low power 2.4-GHz transmitter/receiver CMOS IC. IEEE J. Solid-state Circuits , 2 , 176 - 183
  3. 3)
     • R.H.M. van Veldhoven . A 3.3 mW sigma delta modulator for UMTS in 0.18 µm CMOS with 70 dB dynamic range in 2 MHz bandwidth. IEEE J. Solid-state Circuits , 2069 - 2076
  4. 4)
     • B.J. Minnis , P.A. Moore . A highly digitized receiver architecture for 3G mobiles. IEEE Trans. Veh. Technol. , 637 - 653
  5. 5)
     • S.R. Norsworthy , R. Schreier , G.C. Temes . (1997) Delta-sigma data converters—theory, design and simulation.