A new multi-valued static random access memory (MVSRAM) cell with a hybrid circuit consisting of a single-electron (SE) and MOSFETs is proposed. The previously reported MVSRAM with an SE-MOSFET hybrid circuit needs two data lines, one bit line for write operations and one sense line for read operations, to improve the speed of the read-out operation, but the proposed cell has only one data line for read/write operations, resulting in a memory area that is much smaller than that of the previous cell, without any reduction of read-out speed.
References
-
-
1)
-
H. Inokawa ,
A. Fujiwara ,
Y. Takahashi
.
Multipeak negative-differential-resistance device by combining single-electron and metal-oxide-semiconductor transistors.
Appl. Phys. Lett.
,
3618 -
3620
-
2)
-
Kim, S.J., Kang, J.S., Kim, W.J., Kim, Y.J., Hur, S.M., Baek, I.B., Lee, C.K., Lee, S.D., Choi, J.B.: `Si-SET with a high Coulomb energy of 600K and its hybrid circuit with FET for a multi-valued logic cells operating 77K', 2005 Silicon Nanoelectronics Workshop, June 2005, Kyoto, Japan, p. 138–139.
-
3)
-
Y.S. Yu ,
J.H. Oh ,
S.W. Hwang ,
D. Ahn
.
An equivalent circuit approach for the single electron transistor model for efficient circuit simulation by SPICE.
Electron. Lett.
,
850 -
852
-
4)
-
N.J. Stone ,
H. Ahmed
.
Logic circuit elements using single-electron tunnelling transistors.
Electron. Lett.
,
1883 -
1884
-
5)
-
H. Inokawa ,
A. Fujiwara ,
Y. Takahashi
.
A multi-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors.
IEEE Tran. Electron Devices
,
2 ,
462 -
470
-
6)
-
K.K. Likharev
.
Single-electron devices and their applications.
Proc. IEEE
,
4 ,
606 -
632
http://iet.metastore.ingenta.com/content/journals/10.1049/el_20053134
Related content
content/journals/10.1049/el_20053134
pub_keyword,iet_inspecKeyword,pub_concept
6
6