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Integrated low-power 24-channel EEG front-end

Integrated low-power 24-channel EEG front-end

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The first integrated CMOS multichannel electroencephalogram (EEG) readout front-end, capable of extracting EEG signals from conventional AgCl electrodes without the use of any trimmed components, is presented. Each channel of the ASIC achieves better than 90 dB common-mode rejection ratio (CMRR) at 50 Hz with 50 mV DC offset between EEG electrodes. This is consistent with the presented formula describing the CMRR behaviour of the preamplifier under DC electrode offset. The front-end includes 24 channels and consumes 10.5 mW from a 3 V supply.

References

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      • R. Martins , S. Selberherr , F.A. Vaz . A CMOS IC for portable EEG acquisition systems. IEEE Trans. Instrum. Meas. , 5 , 1191 - 1196
    2. 2)
      • Dal Fabbro, P.A., dos Reis Filho, C.A.: `An integrated instrumentation amplifier with improved CMRR', 15thSymp. on Integrated Circuit and System Design, September 2002, p. 57–61.
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      • C.C. Enz , G.C. Temes . Circuit techniques for reducing the effects of op_amp imperfections: autozeroing, correlated double sampling, and chopper stabilization. Proc. IEEE , 11
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      • K. Koli , K.A.I. Halonen . CMRR enhancement techniques for current-mode instrumentation amplifiers. IEEE Trans. Circuits Syst I , 5
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