Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

Design techniques for low-voltage high-speed pseudo-differential CMOS track-and-hold circuit with low hold pedestal

Design techniques for low-voltage high-speed pseudo-differential CMOS track-and-hold circuit with low hold pedestal

For access to this article, please select a purchase option:

Buy article PDF
£12.50
(plus tax if applicable)
Add to cart
Buy Knowledge Pack
10 articles for £75.00
(plus taxes if applicable)
Add to cart

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

  • Author(s): T.-S. Lee 1  and  C.-C. Lu 2
    • View affiliations
    • Affiliations: 1: Department of Electronic Engineering, National Yunlin University of Science and Technology, Yunlin, Taiwan, Republic of China
      2: Graduate School of Engineering Science and Technology, National Yunlin University of Science and Technology, Yunlin, Taiwan, Republic of China
  • Source: Volume 40, Issue 9, 29 April 2004, p. 519 – 520
    DOI:  10.1049/el:20040368 , Print ISSN 0013-5194, Online ISSN 1350-911X
© IEE
Published

A low-voltage pseudo-differential double-sampled track-and-hold circuit with low hold pedestal based on the Miller-effect scheme is proposed. Rail-to-rail operation of bootstrapped switches allows the low-voltage T/H circuit implementation. Simulation results confirm that the proposed circuit is effective in low-voltage applications with low hold pedestal.

Inspec keywords: high-speed integrated circuits; CMOS integrated circuits; sample and hold circuits; switches; bootstrap circuits; circuit simulation; integrated circuit design; low-power electronics

Other keywords: bootstrapped switches; low voltage track and hold circuit; circuit simulation; low hold pedestal; high speed circuit; Miller effect; low voltage applications; CMOS track and hold circuit design; pseudodifferential circuit

Subjects: Other analogue circuits; CMOS integrated circuits; General circuit analysis and synthesis methods; Relays and switches; Semiconductor integrated circuit design, layout, modelling and testing

References

    1. 1)
      • L. Dai , R. Harjani . CMOS switched-op-amp-based sample-and-hold circuit. IEEE J. Solid-State Circuits , 109 - 113
    2. 2)
    3. 3)
http://iet.metastore.ingenta.com/content/journals/10.1049/el_20040368
Loading

Related content

content/journals/10.1049/el_20040368
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
Print this page
This is a required field
Please enter a valid email address