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Compact low power high slew rate CMOS buffer for large capacitive loads

Compact low power high slew rate CMOS buffer for large capacitive loads

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A new compact CMOS class AB buffer for capacitive loads is presented. Its simple implementation relies on the use of the flipped voltage follower. Simulation results from a 0.35 µm CMOS technology are presented that prove the operating principle under low power conditions. This buffer can also find application in testing of analogue CMOS VLSI circuits, as the input capacitance can be very low without diminishing its output drive capability.

References

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      • Setty, P., Bliss, W.: `A high-frequency BiCMOS buffer for testing analog Ics', Proc. 35th Midwest Symp. on Circuits and Systems, 1992, Washington, DC, USA, 1, p. 768–769.
    2. 2)
      • H. Elwan , M. Ismail . CMOS low noise class AB buffer. Electron. Lett. , 21 , 1834 - 1835
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      • P.M. Van Peteghem , J.F. Duque-Carrillo . Compact high-frequency output buffer for testing of analog CMOS VLSI circuits. IEEE J. Solid-State Circuits , 2 , 540 - 542
    4. 4)
      • Ramírez-Angulo, J., Carvajal, R.G., Torralba, A., Nieva, C.: `The flipped voltage follower: a useful cell for low-voltage, low-power circuit design', Proc. IEEE Int. Symp. on Circuits and Systems, ISCAS '02, Scottsdale, Arizona, USA, III, p. 615–618.
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