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1 V CMOS output stage with excellent linearity

1 V CMOS output stage with excellent linearity

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A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500 Ω resistor it exhibits negligible even harmonic components whilst odd components are maintained well below −20 dB up to 900 mVpp of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.

References

    1. 1)
      • CMOS output stages for low-voltage power supplies
    2. 2)
      • A 1.5-V high drive capability CMOS op-amp
    3. 3)
      • 1.2 V CMOS output stage with improved drive capability
    4. 4)
      • Low-voltage class AB buffers with quiescent current control
    5. 5)
      • Video CMOS power buffer with extended linearity
http://iet.metastore.ingenta.com/content/journals/10.1049/el_20020927
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