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Nonmonotone norm-reduction method for circuit simulation

Nonmonotone norm-reduction method for circuit simulation

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A nonmonotone norm-reduction method for aiding the convergence of Newton–Raphson iteration is presented. The simulation results with some benchmark circuits show that a nonmonotone norm-reduction method may reduce the number of line searches during the iteration.

References

    1. 1)
      • Improvement in norm-reducing Newton methods for circuit simulation
    2. 2)
      • A nonmonotone line search technique for Newton's method
    3. 3)
      • Nonmonotone curvilinear line search method for unconstrained optimization
    4. 4)
      • APLAC – object-oriented circuit simulator and design tool, Low-power HF microelectronics: a unified approach
    5. 5)
      • http://ftp.cbl.ncsu.edu/CBL_Docs/csim90.html
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