Feed-forward approach for timing skew in interleaved and double-sampled circuits

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Feed-forward approach for timing skew in interleaved and double-sampled circuits

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Published

A simple yet effective approach to the generation of switch control signals to reduce timing-skew problems in interleaved and double-sampled switch-capacitor circuits is proposed. No additional switches are required and only a minor increase in complexity is needed to generate the clock phase.

Inspec keywords: timing circuits; signal sampling; switched capacitor networks; analogue-digital conversion; feedforward

Other keywords: switch-capacitor circuits; SC circuits; feedforward approach; interleaved circuits; switch control signal generation; interleaved ADC; double-sampled circuits; clock generator; clock phase generation; timing skew

Subjects: Time varying and switched networks; Other digital circuits; A/D and D/A convertors

References

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